75 lines
2.9 KiB
Text
75 lines
2.9 KiB
Text
Let's Get It Started!
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This user guide uses the NEORV32 project _as is_ from the official `neorv32` repository.
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To make your first NEORV32 project run, follow the guides from the upcoming sections. It is recommended to
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follow these guides step by step and eventually in the presented order.
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[TIP]
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This guide uses the minimalistic and platform/toolchain agnostic SoC **test setups** from
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`rtl/test_setups` for illustration. You can use one of the provided test setups for
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your first FPGA tests. +
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+
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For more sophisticated example setups have a look at the
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https://github.com/stnolting/neorv32-setups[neorv32-setups] repository,
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which provides **SoC setups** for various FPGAs, boards and toolchains.
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**Quick Links**
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* <<_software_toolchain_setup, Toolchain>>, <<_general_hardware_setup, hardware>> and <<_general_software_framework_setup, general software framework>> setup
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* <<_application_program_compilation, compile>> an application and <<_uploading_and_starting_of_a_binary_executable_image_via_uart, upload>> it or making it
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<<_installing_an_executable_directly_into_memory, persistent>> in internal memory
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* setup a new <<_setup_of_a_new_application_program_project, application project>>
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* configure <<_enabling_risc_v_cpu_extensions, RISC-V ISA extensions>> and <<_application_specific_processor_configuration, optimizing>> the core for your application
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* add <<_adding_custom_hardware_modules, custom hardware extensions>> and <<_customizing_the_internal_bootloader, customizing the bootloader>>
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* <<_programming_an_external_spi_flash_via_the_bootloader, program>> an external SPI flash for persistent application storage
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* generate a Xilinx Vivado <<_packaging_the_processor_as_ip_block_for_xilinx_vivado_block_designer, IP block>>
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* <<_simulating_the_processor, simulate>> the processor and <<_building_the_documentation, build the documentation>>
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* RTOS support for <<_zephyr_rtos_support, Zephyr>> and <<_freertos_support, FreeRTOS>>
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* build SoCs using <<_litex_soc_builder_support, LiteX>>
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* in-system <<_debugging_using_the_on_chip_debugger, debugging>> of the whole processor
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* <<_neorv32_in_verilog>> - an all-Verilog "version" of the processor
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include::sw_toolchain_setup.adoc[]
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include::general_hw_setup.adoc[]
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include::general_sw_framework_setup.adoc[]
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include::application_program_compilation.adoc[]
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include::executable_upload.adoc[]
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include::installing_an_executable.adoc[]
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include::new_application_project.adoc[]
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include::enabling_riscv_extensions.adoc[]
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include::application_specific_configuration.adoc[]
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include::adding_custom_hw_modules.adoc[]
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include::customizing_the_bootloader.adoc[]
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include::programming_an_external_spi_flash_via_bootloader.adoc[]
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include::packaging_vivado.adoc[]
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include::simulating_the_processor.adoc[]
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include::building_the_documentation.adoc[]
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include::zephyr_support.adoc[]
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include::free_rtos_support.adoc[]
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include::litex_support.adoc[]
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include::debugging_with_ocd.adoc[]
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include::neorv32_in_verilog.adoc[]
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include::../legal.adoc[]
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