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higepi 2023-03-08 14:50:37 +01:00
parent 7ad8a8d9ab
commit f502b3a9ac
319 changed files with 94978 additions and 111620 deletions
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2
proj_quartus/.qsys_edit/filters.xml Normal file
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@ -0,0 +1,2 @@
<?xml version="1.0" encoding="UTF-8"?>
<filters version="22.1" />

13
proj_quartus/.qsys_edit/preferences.xml Normal file
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@ -0,0 +1,13 @@
<?xml version="1.0" encoding="UTF-8"?>
<preferences>
<debug showDebugMenu="0" />
<systemtable filter="All Interfaces">
<columns>
<connections preferredWidth="143" />
<irq preferredWidth="34" />
</columns>
</systemtable>
<library
expandedCategories="Library/Qsys Interconnect/Memory-Mapped Alpha,Library/Basic Functions/Simulation; Debug and Verification/Simulation,Library/Qsys Interconnect/Memory-Mapped,Library/Basic Functions,Library/Processors and Peripherals/Hard Processor Components,Library/Qsys Interconnect,Library/Basic Functions/On Chip Memory,Project,Library/Memory Interfaces and Controllers,Library/Processors and Peripherals,Library/Basic Functions/Simulation; Debug and Verification,Library" />
<window width="1508" height="946" x="72" y="27" />
</preferences>

8
quartus_project/test_neorv32.qpf → proj_quartus/bootloarder_1.qpf
View file

@ -18,14 +18,14 @@
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 22.1std.0 Build 915 10/25/2022 SC Standard Edition
# Date created = 09:37:35 février 08, 2023
# Version 22.1std.0 Build 915 10/25/2022 SC Lite Edition
# Date created = 14:15:36 March 06, 2023
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "22.1"
DATE = "09:37:35 février 08, 2023"
DATE = "14:15:36 March 06, 2023"
# Revisions
PROJECT_REVISION = "test_neorv32"
PROJECT_REVISION = "test"

0
quartus_project/c5_pin_model_dump.txt → proj_quartus/c5_pin_model_dump.txt
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BIN
proj_quartus/db/.cmp.kpt Normal file
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Binary file not shown.

68
quartus_project/db/altsyncram_cc91.tdf → proj_quartus/db/altsyncram_bg91.tdf
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@ -1,4 +1,4 @@
--altsyncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CYCLONEII_M4K_COMPATIBILITY="ON" DEVICE_FAMILY="Cyclone V" INIT_FILE="test_neorv32.neorv32_test_setup_bootloader0.rtl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=1024 OPERATION_MODE="ROM" OUTDATA_REG_A="UNREGISTERED" RAM_BLOCK_TYPE="AUTO" WIDTH_A=32 WIDTHAD_A=10 address_a clock0 clocken0 q_a CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--altsyncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CYCLONEII_M4K_COMPATIBILITY="ON" DEVICE_FAMILY="Cyclone V" INIT_FILE="bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif" LOW_POWER_MODE="AUTO" NUMWORDS_A=1024 OPERATION_MODE="ROM" OUTDATA_REG_A="UNREGISTERED" RAM_BLOCK_TYPE="AUTO" WIDTH_A=32 WIDTHAD_A=10 address_a clock0 clocken0 q_a CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 22.1 cbx_altera_syncram_nd_impl 2022:10:25:15:32:10:SC cbx_altsyncram 2022:10:25:15:32:10:SC cbx_cycloneii 2022:10:25:15:32:10:SC cbx_lpm_add_sub 2022:10:25:15:32:10:SC cbx_lpm_compare 2022:10:25:15:32:10:SC cbx_lpm_decode 2022:10:25:15:32:10:SC cbx_lpm_mux 2022:10:25:15:32:10:SC cbx_mgl 2022:10:25:15:42:35:SC cbx_nadder 2022:10:25:15:32:10:SC cbx_stratix 2022:10:25:15:32:10:SC cbx_stratixii 2022:10:25:15:32:10:SC cbx_stratixiii 2022:10:25:15:32:10:SC cbx_stratixv 2022:10:25:15:32:10:SC cbx_util_mgl 2022:10:25:15:32:10:SC VERSION_END
@ -25,7 +25,7 @@ RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DAT
--synthesis_resources = M10K 4
OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION";
SUBDESIGN altsyncram_cc91
SUBDESIGN altsyncram_bg91
(
address_a[9..0] : input;
clock0 : input;
@ -38,7 +38,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -58,7 +58,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -78,7 +78,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -98,7 +98,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -118,7 +118,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -138,7 +138,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -158,7 +158,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -178,7 +178,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -198,7 +198,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -218,7 +218,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -238,7 +238,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -258,7 +258,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -278,7 +278,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -298,7 +298,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -318,7 +318,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -338,7 +338,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -358,7 +358,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -378,7 +378,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -398,7 +398,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -418,7 +418,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -438,7 +438,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -458,7 +458,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -478,7 +478,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -498,7 +498,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -518,7 +518,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -538,7 +538,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -558,7 +558,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -578,7 +578,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -598,7 +598,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -618,7 +618,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -638,7 +638,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",
@ -658,7 +658,7 @@ VARIABLE
CLK0_CORE_CLOCK_ENABLE = "ena0",
CLK0_INPUT_CLOCK_ENABLE = "ena0",
CONNECTIVITY_CHECKING = "OFF",
INIT_FILE = "test_neorv32.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE = "bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif",
INIT_FILE_LAYOUT = "port_a",
LOGICAL_RAM_NAME = "ALTSYNCRAM",
OPERATION_MODE = "rom",

0
quartus_project/db/altsyncram_c6q1.tdf → proj_quartus/db/altsyncram_c6q1.tdf
View file

0
quartus_project/db/altsyncram_o6q1.tdf → proj_quartus/db/altsyncram_o6q1.tdf
View file

0
quartus_project/db/altsyncram_u2n1.tdf → proj_quartus/db/altsyncram_u2n1.tdf
View file

0
quartus_project/db/test_neorv32.map.logdb → proj_quartus/db/bootloarder_1.map_bb.logdb
View file

1032
proj_quartus/db/bootloarder_1.neorv32_test_setup_bootloader0.rtl.mif Normal file
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File diff suppressed because it is too large Load diff

24
quartus_project/db/test_neorv32.smp_dump.txt → proj_quartus/db/bootloarder_1.smp_dump.txt
View file

@ -1,5 +1,13 @@
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst|arbiter.state
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_uart:\neorv32_uart0_inst_true:neorv32_uart0_inst|tx_engine.state
Name tx_engine.state.S_TX_SIM tx_engine.state.S_TX_TRANSMIT tx_engine.state.S_TX_CHECK tx_engine.state.S_TX_GET tx_engine.state.S_TX_IDLE
tx_engine.state.S_TX_IDLE 0 0 0 0 0
tx_engine.state.S_TX_GET 0 0 0 1 1
tx_engine.state.S_TX_CHECK 0 0 1 0 1
tx_engine.state.S_TX_TRANSMIT 0 1 0 0 1
tx_engine.state.S_TX_SIM 1 0 0 0 1
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_busswitch:neorv32_busswitch_inst|arbiter.state
Name arbiter.state.B_RETIRE arbiter.state.B_BUSY arbiter.state.A_RETIRE arbiter.state.A_BUSY arbiter.state.IDLE
arbiter.state.IDLE 0 0 0 0 0
arbiter.state.A_BUSY 0 0 0 1 1
@ -7,19 +15,19 @@ arbiter.state.A_RETIRE 0 0 1 0 1
arbiter.state.B_BUSY 0 1 0 0 1
arbiter.state.B_RETIRE 1 0 0 0 1
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|ctrl.state
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_alu:neorv32_cpu_alu_inst|neorv32_cpu_cp_muldiv:\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst|ctrl.state
Name ctrl.state.S_DONE ctrl.state.S_BUSY ctrl.state.S_IDLE
ctrl.state.S_IDLE 0 0 0
ctrl.state.S_BUSY 0 1 1
ctrl.state.S_DONE 1 0 1
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|debug_ctrl.state
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|debug_ctrl.state
Name debug_ctrl.state.DEBUG_LEAVING debug_ctrl.state.DEBUG_ONLINE debug_ctrl.state.DEBUG_OFFLINE
debug_ctrl.state.DEBUG_OFFLINE 0 0 0
debug_ctrl.state.DEBUG_ONLINE 0 1 1
debug_ctrl.state.DEBUG_LEAVING 1 0 1
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev2
Name execute_engine.state_prev2.MEM_WAIT execute_engine.state_prev2.MEM_REQ execute_engine.state_prev2.SYSTEM execute_engine.state_prev2.BRANCH execute_engine.state_prev2.ALU_WAIT execute_engine.state_prev2.EXECUTE execute_engine.state_prev2.TRAP_EXECUTE execute_engine.state_prev2.TRAP_EXIT execute_engine.state_prev2.TRAP_ENTER execute_engine.state_prev2.DISPATCH execute_engine.state_prev2.BRANCHED
execute_engine.state_prev2.BRANCHED 0 0 0 0 0 0 0 0 0 0 0
execute_engine.state_prev2.DISPATCH 0 0 0 0 0 0 0 0 0 1 1
@ -33,7 +41,7 @@ execute_engine.state_prev2.SYSTEM 0 0 1 0 0 0 0 0 0 0 1
execute_engine.state_prev2.MEM_REQ 0 1 0 0 0 0 0 0 0 0 1
execute_engine.state_prev2.MEM_WAIT 1 0 0 0 0 0 0 0 0 0 1
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state_prev
Name execute_engine.state_prev.MEM_WAIT execute_engine.state_prev.MEM_REQ execute_engine.state_prev.SYSTEM execute_engine.state_prev.BRANCH execute_engine.state_prev.ALU_WAIT execute_engine.state_prev.EXECUTE execute_engine.state_prev.TRAP_EXECUTE execute_engine.state_prev.TRAP_EXIT execute_engine.state_prev.TRAP_ENTER execute_engine.state_prev.DISPATCH execute_engine.state_prev.BRANCHED
execute_engine.state_prev.BRANCHED 0 0 0 0 0 0 0 0 0 0 0
execute_engine.state_prev.DISPATCH 0 0 0 0 0 0 0 0 0 1 1
@ -47,7 +55,7 @@ execute_engine.state_prev.SYSTEM 0 0 1 0 0 0 0 0 0 0 1
execute_engine.state_prev.MEM_REQ 0 1 0 0 0 0 0 0 0 0 1
execute_engine.state_prev.MEM_WAIT 1 0 0 0 0 0 0 0 0 0 1
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|execute_engine.state
Name execute_engine.state.MEM_WAIT execute_engine.state.MEM_REQ execute_engine.state.SYSTEM execute_engine.state.BRANCH execute_engine.state.ALU_WAIT execute_engine.state.EXECUTE execute_engine.state.TRAP_EXECUTE execute_engine.state.TRAP_EXIT execute_engine.state.TRAP_ENTER execute_engine.state.DISPATCH execute_engine.state.BRANCHED
execute_engine.state.BRANCHED 0 0 0 0 0 0 0 0 0 0 0
execute_engine.state.DISPATCH 0 0 0 0 0 0 0 0 0 1 1
@ -61,14 +69,14 @@ execute_engine.state.SYSTEM 0 0 1 0 0 0 0 0 0 0 1
execute_engine.state.MEM_REQ 0 1 0 0 0 0 0 0 0 0 1
execute_engine.state.MEM_WAIT 1 0 0 0 0 0 0 0 0 0 1
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state_prev
Name fetch_engine.state_prev.IF_WAIT fetch_engine.state_prev.IF_PENDING fetch_engine.state_prev.IF_REQUEST fetch_engine.state_prev.IF_RESTART
fetch_engine.state_prev.IF_RESTART 0 0 0 0
fetch_engine.state_prev.IF_REQUEST 0 0 1 1
fetch_engine.state_prev.IF_PENDING 0 1 0 1
fetch_engine.state_prev.IF_WAIT 1 0 0 1
State Machine - |neorv32_test_setup_approm|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state
State Machine - |neorv32_test_setup_bootloader|neorv32_top:neorv32_top_inst|neorv32_cpu:neorv32_cpu_inst|neorv32_cpu_control:neorv32_cpu_control_inst|fetch_engine.state
Name fetch_engine.state.IF_WAIT fetch_engine.state.IF_PENDING fetch_engine.state.IF_REQUEST fetch_engine.state.IF_RESTART
fetch_engine.state.IF_RESTART 0 0 0 0
fetch_engine.state.IF_REQUEST 0 0 1 1

252
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6
proj_quartus/db/test.asm.qmsg Normal file
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@ -0,0 +1,6 @@
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1678267862173 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 22.1std.0 Build 915 10/25/2022 SC Lite Edition " "Version 22.1std.0 Build 915 10/25/2022 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1678267862173 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 8 10:31:02 2023 " "Processing started: Wed Mar 8 10:31:02 2023" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1678267862173 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1678267862173 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off bootloarder_1 -c test " "Command: quartus_asm --read_settings_files=off --write_settings_files=off bootloarder_1 -c test" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1678267862173 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1678267862688 ""}
{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1678267867494 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1 Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "543 " "Peak virtual memory: 543 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1678267867877 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 8 10:31:07 2023 " "Processing ended: Wed Mar 8 10:31:07 2023" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1678267867877 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1678267867877 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1678267867877 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1678267867877 ""}

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35
quartus_project/db/test_neorv32.cmp.logdb → proj_quartus/db/test.cmp.logdb
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@ -11,40 +11,41 @@ IO_RULES,OCT_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000047,I/O Properties Checks for
IO_RULES,LOC_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000046,I/O Properties Checks for One I/O,The location should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
IO_RULES,IO_STD_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000045,I/O Properties Checks for One I/O,The I/O standard should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
IO_RULES,WEAK_PULL_UP_AND_BUS_HOLD_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000027,I/O Properties Checks for One I/O,Weak Pull Up and Bus Hold should not be used at the same time.,Critical,No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found.,,I/O,,
IO_RULES,OCT_AND_CURRENT_STRENGTH_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000026,I/O Properties Checks for One I/O,On Chip Termination and Current Strength should not be used at the same time.,Critical,No Current Strength assignments found.,,I/O,,
IO_RULES,IO_DIR_SUPPORT_OCT_VALUE,PASS,IO_000024,I/O Properties Checks for One I/O,The I/O direction should support the On Chip Termination value.,Critical,0 such failures found.,,I/O,,
IO_RULES,OCT_AND_CURRENT_STRENGTH_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000026,I/O Properties Checks for One I/O,On Chip Termination and Current Strength should not be used at the same time.,Critical,No Current Strength or Termination assignments found.,,I/O,,
IO_RULES,IO_DIR_SUPPORT_OCT_VALUE,INAPPLICABLE,IO_000024,I/O Properties Checks for One I/O,The I/O direction should support the On Chip Termination value.,Critical,No Termination assignments found.,,I/O,,
IO_RULES,IO_STD_SUPPORT_OPEN_DRAIN_VALUE,INAPPLICABLE,IO_000023,I/O Properties Checks for One I/O,The I/O standard should support the Open Drain value.,Critical,No open drain assignments found.,,I/O,,
IO_RULES,IO_STD_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000022,I/O Properties Checks for One I/O,The I/O standard should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
IO_RULES,IO_STD_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000021,I/O Properties Checks for One I/O,The I/O standard should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
IO_RULES,IO_STD_SUPPORT_PCI_CLAMP_DIODE,INAPPLICABLE,IO_000020,I/O Properties Checks for One I/O,The I/O standard should support the requested PCI Clamp Diode.,Critical,No Clamping Diode assignments found.,,I/O,,
IO_RULES,IO_STD_SUPPORT_OCT_VALUE,PASS,IO_000019,I/O Properties Checks for One I/O,The I/O standard should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
IO_RULES,IO_STD_SUPPORT_OCT_VALUE,INAPPLICABLE,IO_000019,I/O Properties Checks for One I/O,The I/O standard should support the requested On Chip Termination value.,Critical,No Termination assignments found.,,I/O,,
IO_RULES,IO_STD_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000018,I/O Properties Checks for One I/O,The I/O standard should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
IO_RULES,LOC_SUPPORT_PCI_CLAMP_DIODE,INAPPLICABLE,IO_000015,I/O Properties Checks for One I/O,The location should support the requested PCI Clamp Diode.,Critical,No Clamping Diode assignments found.,,I/O,,
IO_RULES,LOC_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000014,I/O Properties Checks for One I/O,The location should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
IO_RULES,LOC_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000013,I/O Properties Checks for One I/O,The location should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
IO_RULES,LOC_SUPPORT_OCT_VALUE,PASS,IO_000012,I/O Properties Checks for One I/O,The location should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
IO_RULES,LOC_SUPPORT_OCT_VALUE,INAPPLICABLE,IO_000012,I/O Properties Checks for One I/O,The location should support the requested On Chip Termination value.,Critical,No Termination assignments found.,,I/O,,
IO_RULES,LOC_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000011,I/O Properties Checks for One I/O,The location should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
IO_RULES,LOC_SUPPORT_IO_DIR,PASS,IO_000010,I/O Properties Checks for One I/O,The location should support the requested I/O direction.,Critical,0 such failures found.,,I/O,,
IO_RULES,LOC_SUPPORT_IO_STD,PASS,IO_000009,I/O Properties Checks for One I/O,The location should support the requested I/O standard.,Critical,0 such failures found.,,I/O,,
IO_RULES,SINGLE_ENDED_OUTPUTS_LAB_ROWS_FROM_DIFF_IO,INAPPLICABLE,IO_000034,SI Related Distance Checks,Single-ended outputs should be 0 LAB row(s) away from a differential I/O.,High,No Differential I/O Standard assignments found.,,I/O,,
IO_RULES,DEV_IO_RULE_OCT_DISCLAIMER,,,,,,,,,,
IO_RULES_MATRIX,Pin/Rules,IO_000002;IO_000001;IO_000003;IO_000004;IO_000005;IO_000006;IO_000007;IO_000008;IO_000047;IO_000046;IO_000045;IO_000027;IO_000026;IO_000024;IO_000023;IO_000022;IO_000021;IO_000020;IO_000019;IO_000018;IO_000015;IO_000014;IO_000013;IO_000012;IO_000011;IO_000010;IO_000009;IO_000034,
IO_RULES_MATRIX,Total Pass,0;10;10;0;0;10;10;0;0;0;0;0;0;8;0;0;0;0;8;0;0;0;0;8;0;10;10;0,
IO_RULES_MATRIX,Total Pass,0;12;12;0;0;12;12;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;12;12;0,
IO_RULES_MATRIX,Total Unchecked,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
IO_RULES_MATRIX,Total Inapplicable,10;0;0;10;10;0;0;10;10;10;10;10;10;2;10;10;10;10;2;10;10;10;10;2;10;0;0;10,
IO_RULES_MATRIX,Total Inapplicable,12;0;0;12;12;0;0;12;12;12;12;12;12;12;12;12;12;12;12;12;12;12;12;12;12;0;0;12,
IO_RULES_MATRIX,Total Fail,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
IO_RULES_MATRIX,gpio_o[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,gpio_o[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,uart0_txd_o,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,clk_i,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,rstn_i,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_MATRIX,uart0_rxd_i,Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
IO_RULES_SUMMARY,Total I/O Rules,28,
IO_RULES_SUMMARY,Number of I/O Rules Passed,9,
IO_RULES_SUMMARY,Number of I/O Rules Passed,6,
IO_RULES_SUMMARY,Number of I/O Rules Failed,0,
IO_RULES_SUMMARY,Number of I/O Rules Unchecked,0,
IO_RULES_SUMMARY,Number of I/O Rules Inapplicable,19,
IO_RULES_SUMMARY,Number of I/O Rules Inapplicable,22,

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quartus_project/db/test_neorv32.cyclonev_io_sim_cache.ff_0c_fast.hsd → proj_quartus/db/test.cyclonev_io_sim_cache.ff_0c_fast.hsd
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quartus_project/db/test_neorv32.cyclonev_io_sim_cache.ff_85c_fast.hsd → proj_quartus/db/test.cyclonev_io_sim_cache.ff_85c_fast.hsd
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quartus_project/db/test_neorv32.cyclonev_io_sim_cache.tt_0c_slow.hsd → proj_quartus/db/test.cyclonev_io_sim_cache.tt_0c_slow.hsd
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proj_quartus/db/test.cyclonev_io_sim_cache.tt_85c_slow.hsd Normal file
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proj_quartus/db/test.db_info Normal file
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@ -0,0 +1,3 @@
Quartus_Version = Version 22.1std.0 Build 915 10/25/2022 SC Lite Edition
Version_Index = 553882368
Creation_Time = Wed Mar 8 10:26:04 2023

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proj_quartus/db/test.eda.qmsg Normal file
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1678267876208 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 22.1std.0 Build 915 10/25/2022 SC Lite Edition " "Version 22.1std.0 Build 915 10/25/2022 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1678267876208 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 8 10:31:16 2023 " "Processing started: Wed Mar 8 10:31:16 2023" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1678267876208 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1678267876208 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off bootloarder_1 -c test " "Command: quartus_eda --read_settings_files=off --write_settings_files=off bootloarder_1 -c test" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1678267876208 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1678267876749 ""}
{ "Info" "IWSC_DONE_HDL_GENERATION" "test.vo /home/stepan/Travail/SETI/Projet/proj_quartus/simulation/questa/ simulation " "Generated file test.vo in folder \"/home/stepan/Travail/SETI/Projet/proj_quartus/simulation/questa/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1678267877239 ""}
{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 1 Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "713 " "Peak virtual memory: 713 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1678267877287 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 8 10:31:17 2023 " "Processing ended: Wed Mar 8 10:31:17 2023" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1678267877287 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1678267877287 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1678267877287 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1678267877287 ""}

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