402 lines
6.2 KiB
HTML
402 lines
6.2 KiB
HTML
<TABLE>
|
|
<TR bgcolor="#C0C0C0">
|
|
<TH>Hierarchy</TH>
|
|
<TH>Input</TH>
|
|
<TH>Constant Input</TH>
|
|
<TH>Unused Input</TH>
|
|
<TH>Floating Input</TH>
|
|
<TH>Output</TH>
|
|
<TH>Constant Output</TH>
|
|
<TH>Unused Output</TH>
|
|
<TH>Floating Output</TH>
|
|
<TH>Bidir</TH>
|
|
<TH>Constant Bidir</TH>
|
|
<TH>Unused Bidir</TH>
|
|
<TH>Input only Bidir</TH>
|
|
<TH>Output only Bidir</TH>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_sysinfo_inst</TD>
|
|
<TD >35</TD>
|
|
<TD >0</TD>
|
|
<TD >25</TD>
|
|
<TD >0</TD>
|
|
<TD >34</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_uart0_inst_true:neorv32_uart0_inst|rx_engine_fifo_inst</TD>
|
|
<TD >15</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >13</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_uart0_inst_true:neorv32_uart0_inst|tx_engine_fifo_inst</TD>
|
|
<TD >37</TD>
|
|
<TD >24</TD>
|
|
<TD >0</TD>
|
|
<TD >24</TD>
|
|
<TD >35</TD>
|
|
<TD >24</TD>
|
|
<TD >24</TD>
|
|
<TD >24</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_uart0_inst_true:neorv32_uart0_inst</TD>
|
|
<TD >78</TD>
|
|
<TD >0</TD>
|
|
<TD >25</TD>
|
|
<TD >0</TD>
|
|
<TD >38</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_mtime_inst_true:neorv32_mtime_inst</TD>
|
|
<TD >68</TD>
|
|
<TD >0</TD>
|
|
<TD >25</TD>
|
|
<TD >0</TD>
|
|
<TD >34</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_gpio_inst_true:neorv32_gpio_inst</TD>
|
|
<TD >132</TD>
|
|
<TD >0</TD>
|
|
<TD >25</TD>
|
|
<TD >0</TD>
|
|
<TD >98</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_boot_rom_inst_true:neorv32_boot_rom_inst</TD>
|
|
<TD >35</TD>
|
|
<TD >0</TD>
|
|
<TD >5</TD>
|
|
<TD >0</TD>
|
|
<TD >34</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_int_dmem_inst_true:neorv32_int_dmem_inst</TD>
|
|
<TD >71</TD>
|
|
<TD >0</TD>
|
|
<TD >2</TD>
|
|
<TD >0</TD>
|
|
<TD >33</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|\neorv32_int_imem_inst_true:neorv32_int_imem_inst</TD>
|
|
<TD >71</TD>
|
|
<TD >0</TD>
|
|
<TD >2</TD>
|
|
<TD >0</TD>
|
|
<TD >34</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_bus_keeper_inst</TD>
|
|
<TD >107</TD>
|
|
<TD >3</TD>
|
|
<TD >90</TD>
|
|
<TD >3</TD>
|
|
<TD >34</TD>
|
|
<TD >3</TD>
|
|
<TD >3</TD>
|
|
<TD >3</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_busswitch_inst</TD>
|
|
<TD >180</TD>
|
|
<TD >41</TD>
|
|
<TD >0</TD>
|
|
<TD >41</TD>
|
|
<TD >141</TD>
|
|
<TD >41</TD>
|
|
<TD >41</TD>
|
|
<TD >41</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_bus_inst</TD>
|
|
<TD >873</TD>
|
|
<TD >1</TD>
|
|
<TD >764</TD>
|
|
<TD >1</TD>
|
|
<TD >142</TD>
|
|
<TD >1</TD>
|
|
<TD >1</TD>
|
|
<TD >1</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_alu_inst|\neorv32_cpu_cp_muldiv_inst_true:neorv32_cpu_cp_muldiv_inst</TD>
|
|
<TD >136</TD>
|
|
<TD >0</TD>
|
|
<TD >65</TD>
|
|
<TD >0</TD>
|
|
<TD >33</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_alu_inst|neorv32_cpu_cp_shifter_inst</TD>
|
|
<TD >109</TD>
|
|
<TD >0</TD>
|
|
<TD >66</TD>
|
|
<TD >0</TD>
|
|
<TD >33</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_alu_inst</TD>
|
|
<TD >263</TD>
|
|
<TD >5</TD>
|
|
<TD >64</TD>
|
|
<TD >5</TD>
|
|
<TD >72</TD>
|
|
<TD >5</TD>
|
|
<TD >5</TD>
|
|
<TD >5</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_regfile_inst|reg_file[0][31]__2|auto_generated</TD>
|
|
<TD >44</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >32</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_regfile_inst|reg_file[0][31]__1|auto_generated</TD>
|
|
<TD >44</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >32</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_regfile_inst</TD>
|
|
<TD >198</TD>
|
|
<TD >0</TD>
|
|
<TD >50</TD>
|
|
<TD >0</TD>
|
|
<TD >128</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_control_inst|\neorv32_cpu_decompressor_inst_true:neorv32_cpu_decompressor_inst</TD>
|
|
<TD >16</TD>
|
|
<TD >2</TD>
|
|
<TD >0</TD>
|
|
<TD >2</TD>
|
|
<TD >33</TD>
|
|
<TD >2</TD>
|
|
<TD >2</TD>
|
|
<TD >2</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_control_inst|\prefetch_buffer:1:prefetch_buffer_inst</TD>
|
|
<TD >23</TD>
|
|
<TD >3</TD>
|
|
<TD >0</TD>
|
|
<TD >3</TD>
|
|
<TD >21</TD>
|
|
<TD >3</TD>
|
|
<TD >3</TD>
|
|
<TD >3</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_control_inst|\prefetch_buffer:0:prefetch_buffer_inst</TD>
|
|
<TD >23</TD>
|
|
<TD >3</TD>
|
|
<TD >0</TD>
|
|
<TD >3</TD>
|
|
<TD >21</TD>
|
|
<TD >3</TD>
|
|
<TD >3</TD>
|
|
<TD >3</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst|neorv32_cpu_control_inst</TD>
|
|
<TD >166</TD>
|
|
<TD >677</TD>
|
|
<TD >7</TD>
|
|
<TD >677</TD>
|
|
<TD >902</TD>
|
|
<TD >677</TD>
|
|
<TD >677</TD>
|
|
<TD >677</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst|neorv32_cpu_inst</TD>
|
|
<TD >90</TD>
|
|
<TD >17</TD>
|
|
<TD >0</TD>
|
|
<TD >17</TD>
|
|
<TD >109</TD>
|
|
<TD >17</TD>
|
|
<TD >17</TD>
|
|
<TD >17</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
<TD >0</TD>
|
|
</TR>
|
|
<TR >
|
|
<TD >neorv32_top_inst</TD>
|
|
<TD >457</TD>
|
|
<TD >586</TD>
|
|
<TD >325</TD>
|
|
<TD >586</TD>
|
|
<TD >531</TD>
|
|
<TD >586</TD>
|
|
<TD >586</TD>
|
|
<TD >586</TD>
|
|
<TD >3</TD>
|
|
<TD >0</TD>
|
|
<TD >3</TD>
|
|
<TD >0</TD>
|
|
<TD >3</TD>
|
|
</TR>
|
|
</TABLE>
|