266 lines
6.5 KiB
C
266 lines
6.5 KiB
C
/* Model support.
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Copyright (C) 1996-2022 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This must come before any other includes. */
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#include "defs.h"
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#include "bfd.h"
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#include "libiberty.h"
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#include "sim-main.h"
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#include "sim-model.h"
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#include "sim-options.h"
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#include "sim-io.h"
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#include "sim-assert.h"
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static void model_set (sim_cpu *, const SIM_MODEL *);
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static DECLARE_OPTION_HANDLER (model_option_handler);
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static MODULE_INIT_FN sim_model_init;
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enum {
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OPTION_MODEL = OPTION_START,
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OPTION_MODEL_INFO,
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};
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static const OPTION model_options[] = {
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{ {"model", required_argument, NULL, OPTION_MODEL},
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'\0', "MODEL", "Specify model to simulate",
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model_option_handler, NULL },
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{ {"model-info", no_argument, NULL, OPTION_MODEL_INFO},
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'\0', NULL, "List selectable models",
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model_option_handler, NULL },
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{ {"info-model", no_argument, NULL, OPTION_MODEL_INFO},
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'\0', NULL, NULL,
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model_option_handler, NULL },
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{ {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL, NULL }
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};
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static SIM_RC
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model_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
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char *arg, int is_command)
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{
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switch (opt)
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{
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case OPTION_MODEL :
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{
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const SIM_MODEL *model = sim_model_lookup (sd, arg);
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if (! model)
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{
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sim_io_eprintf (sd, "unknown model `%s'\n", arg);
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return SIM_RC_FAIL;
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}
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STATE_MODEL_NAME (sd) = arg;
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sim_model_set (sd, cpu, model);
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break;
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}
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case OPTION_MODEL_INFO :
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{
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const SIM_MACH * const *machp;
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const SIM_MODEL *model;
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if (STATE_MACHS (sd) == NULL)
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{
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sim_io_printf (sd, "This target does not support any models\n");
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return SIM_RC_FAIL;
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}
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for (machp = STATE_MACHS(sd); *machp != NULL; ++machp)
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{
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sim_io_printf (sd, "Models for architecture `%s':\n",
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MACH_NAME (*machp));
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for (model = MACH_MODELS (*machp); MODEL_NAME (model) != NULL;
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++model)
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sim_io_printf (sd, " %s", MODEL_NAME (model));
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sim_io_printf (sd, "\n");
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}
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break;
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}
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}
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return SIM_RC_OK;
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}
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SIM_RC
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sim_model_install (SIM_DESC sd)
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{
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SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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sim_add_option_table (sd, NULL, model_options);
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sim_module_add_init_fn (sd, sim_model_init);
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return SIM_RC_OK;
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}
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/* Subroutine of sim_model_set to set the model for one cpu. */
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static void
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model_set (sim_cpu *cpu, const SIM_MODEL *model)
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{
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CPU_MACH (cpu) = MODEL_MACH (model);
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CPU_MODEL (cpu) = model;
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(* MACH_INIT_CPU (MODEL_MACH (model))) (cpu);
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(* MODEL_INIT (model)) (cpu);
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}
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/* Set the current model of CPU to MODEL.
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If CPU is NULL, all cpus are set to MODEL. */
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void
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sim_model_set (SIM_DESC sd, sim_cpu *cpu, const SIM_MODEL *model)
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{
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if (! cpu)
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{
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int c;
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for (c = 0; c < MAX_NR_PROCESSORS; ++c)
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if (STATE_CPU (sd, c))
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model_set (STATE_CPU (sd, c), model);
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}
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else
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{
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model_set (cpu, model);
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}
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}
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/* Look up model named NAME.
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Result is pointer to MODEL entry or NULL if not found. */
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const SIM_MODEL *
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sim_model_lookup (SIM_DESC sd, const char *name)
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{
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const SIM_MACH * const *machp;
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const SIM_MODEL *model;
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if (STATE_MACHS (sd) == NULL)
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return NULL;
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for (machp = STATE_MACHS (sd); *machp != NULL; ++machp)
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{
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for (model = MACH_MODELS (*machp); MODEL_NAME (model) != NULL; ++model)
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{
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if (strcmp (MODEL_NAME (model), name) == 0)
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return model;
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}
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}
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return NULL;
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}
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/* Look up machine named NAME.
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Result is pointer to MACH entry or NULL if not found. */
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const SIM_MACH *
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sim_mach_lookup (SIM_DESC sd, const char *name)
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{
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const SIM_MACH * const *machp;
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if (STATE_MACHS (sd) == NULL)
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return NULL;
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for (machp = STATE_MACHS (sd); *machp != NULL; ++machp)
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{
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if (strcmp (MACH_NAME (*machp), name) == 0)
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return *machp;
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}
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return NULL;
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}
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/* Look up a machine via its bfd name.
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Result is pointer to MACH entry or NULL if not found. */
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const SIM_MACH *
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sim_mach_lookup_bfd_name (SIM_DESC sd, const char *name)
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{
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const SIM_MACH * const *machp;
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if (STATE_MACHS (sd) == NULL)
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return NULL;
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for (machp = STATE_MACHS (sd); *machp != NULL; ++machp)
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{
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if (strcmp (MACH_BFD_NAME (*machp), name) == 0)
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return *machp;
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}
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return NULL;
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}
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/* Initialize model support. */
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static SIM_RC
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sim_model_init (SIM_DESC sd)
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{
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SIM_CPU *cpu;
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/* If both cpu model and state architecture are set, ensure they're
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compatible. If only one is set, set the other. If neither are set,
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use the default model. STATE_ARCHITECTURE is the bfd_arch_info data
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for the selected "mach" (bfd terminology). */
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/* Only check cpu 0. STATE_ARCHITECTURE is for that one only. */
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/* ??? At present this only supports homogeneous multiprocessors. */
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cpu = STATE_CPU (sd, 0);
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if (! STATE_ARCHITECTURE (sd)
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&& ! CPU_MACH (cpu)
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&& STATE_MODEL_NAME (sd))
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{
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/* Set the default model. */
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const SIM_MODEL *model = sim_model_lookup (sd, STATE_MODEL_NAME (sd));
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SIM_ASSERT (model != NULL);
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sim_model_set (sd, NULL, model);
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}
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if (STATE_ARCHITECTURE (sd)
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&& CPU_MACH (cpu))
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{
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if (strcmp (STATE_ARCHITECTURE (sd)->printable_name,
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MACH_BFD_NAME (CPU_MACH (cpu))) != 0)
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{
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sim_io_eprintf (sd, "invalid model `%s' for `%s'\n",
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MODEL_NAME (CPU_MODEL (cpu)),
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STATE_ARCHITECTURE (sd)->printable_name);
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return SIM_RC_FAIL;
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}
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}
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else if (STATE_ARCHITECTURE (sd) && STATE_MACHS (sd))
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{
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/* Use the default model for the selected machine.
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The default model is the first one in the list. */
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const SIM_MACH *mach =
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sim_mach_lookup_bfd_name (sd, STATE_ARCHITECTURE (sd)->printable_name);
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if (mach == NULL)
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{
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sim_io_eprintf (sd, "unsupported machine `%s'\n",
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STATE_ARCHITECTURE (sd)->printable_name);
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return SIM_RC_FAIL;
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}
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sim_model_set (sd, NULL, MACH_MODELS (mach));
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}
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else if (CPU_MACH (cpu))
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{
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STATE_ARCHITECTURE (sd) = bfd_scan_arch (MACH_BFD_NAME (CPU_MACH (cpu)));
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}
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return SIM_RC_OK;
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}
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