300 lines
8.7 KiB
Text
300 lines
8.7 KiB
Text
@c Copyright (C) 1991-2022 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node OpenRISC-Dependent
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@chapter OPENRISC Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter OPENRISC Dependent Features
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@end ifclear
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@cindex OPENRISC support
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@menu
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* OpenRISC-Syntax:: Syntax
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* OpenRISC-Float:: Floating Point
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* OpenRISC-Directives:: OpenRISC Machine Directives
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* OpenRISC-Opcodes:: Opcodes
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@end menu
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@cindex OPENRISC syntax
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@cindex syntax, OPENRISC
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@node OpenRISC-Syntax
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@section OpenRISC Syntax
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The assembler syntax follows the OpenRISC 1000 Architecture Manual.
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@menu
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* OpenRISC-Chars:: Special Characters
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* OpenRISC-Regs:: Register Names
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* OpenRISC-Relocs:: Relocations
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@end menu
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@node OpenRISC-Chars
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@subsection Special Characters
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@cindex line comment character, OpenRISC
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@cindex OpenRISC line comment character
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A @samp{#} character appearing anywhere on a line indicates the start
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of a comment that extends to the end of that line.
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@cindex line separator, OpenRISC
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@cindex statement separator, OpenRISC
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@cindex OpenRISC line separator
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@samp{;} can be used instead of a newline to separate statements.
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@node OpenRISC-Regs
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@subsection Register Names
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@cindex OpenRISC registers
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@cindex register names, OpenRISC
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The OpenRISC register file contains 32 general pupose registers.
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@itemize @bullet
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@item
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The 32 general purpose registers are referred to as @samp{r@var{n}}.
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@item
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The stack pointer register @samp{r1} can be referenced using the alias
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@samp{sp}.
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@item
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The frame pointer register @samp{r2} can be referenced using the alias
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@samp{fp}.
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@item
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The link register @samp{r9} can be referenced using the alias @samp{lr}.
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@end itemize
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Floating point operations use the same general purpose registers. The
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instructions @code{lf.itof.s} (single precision) and @code{lf.itof.d} (double
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precision) can be used to convert integer values to floating point.
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Likewise, instructions @code{lf.ftoi.s} (single precision) and
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@code{lf.ftoi.d} (double precision) can be used to convert floating point to
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integer.
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OpenRISC also contains privileged special purpose registers (SPRs). The
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SPRs are accessed using the @code{l.mfspr} and @code{l.mtspr} instructions.
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@node OpenRISC-Relocs
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@subsection Relocations
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@cindex OpenRISC relocations
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@cindex relocations, OpenRISC
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ELF relocations are available as defined in the OpenRISC architecture
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specification.
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@code{R_OR1K_HI_16_IN_INSN} is obtained using @samp{hi} and
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@code{R_OR1K_LO_16_IN_INSN} and @code{R_OR1K_SLO16} are obtained using
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@samp{lo}. For signed offsets @code{R_OR1K_AHI16} is obtained from
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@samp{ha}. For example:
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@example
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l.movhi r5, hi(symbol)
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l.ori r5, r5, lo(symbol)
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l.movhi r5, ha(symbol)
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l.addi r5, r5, lo(symbol)
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@end example
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These ``high'' mnemonics extract bits 31:16 of their operand,
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and the ``low'' mnemonics extract bits 15:0 of their operand.
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The PC relative relocation @code{R_OR1K_GOTPC_HI16} can be obtained by
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enclosing an operand inside of @samp{gotpchi}. Likewise, the
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@code{R_OR1K_GOTPC_LO16} relocation can be obtained using @samp{gotpclo}.
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These are mostly used when assembling PIC code. For example, the
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standard PIC sequence on OpenRISC to get the base of the global offset
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table, PC relative, into a register, can be performed as:
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@example
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l.jal 0x8
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l.movhi r17, gotpchi(_GLOBAL_OFFSET_TABLE_-4)
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l.ori r17, r17, gotpclo(_GLOBAL_OFFSET_TABLE_+0)
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l.add r17, r17, r9
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@end example
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Several relocations exist to allow the link editor to perform GOT data
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references. The @code{R_OR1K_GOT16} relocation can obtained by enclosing an
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operand inside of @samp{got}. For example, assuming the GOT base is in
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register @code{r17}.
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@example
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l.lwz r19, got(a)(r17)
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l.lwz r21, 0(r19)
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@end example
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Also, several relocations exist for local GOT references. The
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@code{R_OR1K_GOTOFF_AHI16} relocation can obtained by enclosing an operand
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inside of @samp{gotoffha}. Likewise, @code{R_OR1K_GOTOFF_LO16} and
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@code{R_OR1K_GOTOFF_SLO16} can be obtained by enclosing an operand inside of
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@samp{gotofflo}. For example, assuming the GOT base is in register
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@code{rl7}:
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@example
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l.movhi r19, gotoffha(symbol)
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l.add r19, r19, r17
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l.lwz r19, gotofflo(symbol)(r19)
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@end example
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The above PC relative relocations use a @code{l.jal} (jump) instruction
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and reading of the link register to load the PC. OpenRISC also supports
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page offset PC relative locations without a jump instruction using the
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@code{l.adrp} instruction. By default the @code{l.adrp} instruction will
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create an @code{R_OR1K_PCREL_PG21} relocation.
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Likewise, @code{BFD_RELOC_OR1K_LO13} and @code{BFD_RELOC_OR1K_SLO13} can
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be obtained by enclosing an operand inside of @samp{po}. For example:
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@example
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l.adrp r3, symbol
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l.ori r4, r3, po(symbol)
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l.lbz r5, po(symbol)(r3)
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l.sb po(symbol)(r3), r6
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@end example
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Likewise the page offset relocations can be used with GOT references. The
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relocation @code{R_OR1K_GOT_PG21} can be obtained by enclosing an
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@code{l.adrp} immediate operand inside of @samp{got}. Likewise,
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@code{R_OR1K_GOT_LO13} can be obtained by enclosing an operand inside of
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@samp{gotpo}. For example to load the value of a GOT symbol into register
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@samp{r5} we can do:
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@example
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l.adrp r17, got(_GLOBAL_OFFSET_TABLE_)
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l.lwz r5, gotpo(symbol)(r17)
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@end example
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There are many relocations that can be requested for access to
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thread local storage variables. All of the OpenRISC TLS mnemonics
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are supported:
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@itemize @bullet
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@item
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@code{R_OR1K_TLS_GD_HI16} is requested using @samp{tlsgdhi}.
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@item
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@code{R_OR1K_TLS_GD_LO16} is requested using @samp{tlsgdlo}.
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@item
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@code{R_OR1K_TLS_GD_PG21} is requested using @samp{tldgd}.
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@item
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@code{R_OR1K_TLS_GD_LO13} is requested using @samp{tlsgdpo}.
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@item
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@code{R_OR1K_TLS_LDM_HI16} is requested using @samp{tlsldmhi}.
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@item
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@code{R_OR1K_TLS_LDM_LO16} is requested using @samp{tlsldmlo}.
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@item
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@code{R_OR1K_TLS_LDM_PG21} is requested using @samp{tldldm}.
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@item
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@code{R_OR1K_TLS_LDM_LO13} is requested using @samp{tlsldmpo}.
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@item
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@code{R_OR1K_TLS_LDO_HI16} is requested using @samp{dtpoffhi}.
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@item
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@code{R_OR1K_TLS_LDO_LO16} is requested using @samp{dtpofflo}.
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@item
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@code{R_OR1K_TLS_IE_HI16} is requested using @samp{gottpoffhi}.
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@item
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@code{R_OR1K_TLS_IE_AHI16} is requested using @samp{gottpoffha}.
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@item
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@code{R_OR1K_TLS_IE_LO16} is requested using @samp{gottpofflo}.
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@item
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@code{R_OR1K_TLS_IE_PG21} is requested using @samp{gottp}.
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@item
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@code{R_OR1K_TLS_IE_LO13} is requested using @samp{gottppo}.
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@item
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@code{R_OR1K_TLS_LE_HI16} is requested using @samp{tpoffhi}.
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@item
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@code{R_OR1K_TLS_LE_AHI16} is requested using @samp{tpoffha}.
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@item
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@code{R_OR1K_TLS_LE_LO16} is requested using @samp{tpofflo}.
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@item
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@code{R_OR1K_TLS_LE_SLO16} also is requested using @samp{tpofflo}
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depending on the instruction format.
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@end itemize
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Here are some example TLS model sequences.
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First, General Dynamic:
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@example
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l.movhi r17, tlsgdhi(symbol)
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l.ori r17, r17, tlsgdlo(symbol)
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l.add r17, r17, r16
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l.or r3, r17, r17
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l.jal plt(__tls_get_addr)
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l.nop
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@end example
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Initial Exec:
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@example
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l.movhi r17, gottpoffhi(symbol)
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l.add r17, r17, r16
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l.lwz r17, gottpofflo(symbol)(r17)
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l.add r17, r17, r10
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l.lbs r17, 0(r17)
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@end example
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And finally, Local Exec:
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@example
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l.movhi r17, tpoffha(symbol)
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l.add r17, r17, r10
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l.addi r17, r17, tpofflo(symbol)
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l.lbs r17, 0(r17)
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@end example
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@node OpenRISC-Float
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@section Floating Point
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@cindex floating point, OPENRISC (@sc{ieee})
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@cindex OPENRISC floating point (@sc{ieee})
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OpenRISC uses @sc{ieee} floating-point numbers.
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@node OpenRISC-Directives
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@section OpenRISC Machine Directives
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@cindex OPENRISC machine directives
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@cindex machine directives, OPENRISC
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The OpenRISC version of @code{@value{AS}} supports the following additional
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machine directives:
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@table @code
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@cindex @code{align} directive, OpenRISC
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@item .align
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This must be followed by the desired alignment in bytes.
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@cindex @code{word} directive, OpenRISC
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@item .word
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On the OpenRISC, the @code{.word} directive produces a 32 bit value.
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@cindex @code{nodelay} directive, OpenRISC
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@item .nodelay
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On the OpenRISC, the @code{.nodelay} directive sets a flag in elf binaries
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indicating that the binary is generated catering for no delay slots.
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@cindex @code{proc} directive, OpenRISC
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@item .proc
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This directive is ignored. Any text following it on the same
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line is also ignored.
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@cindex @code{endproc} directive, OpenRISC
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@item .endproc
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This directive is ignored. Any text following it on the same
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line is also ignored.
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@end table
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@node OpenRISC-Opcodes
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@section Opcodes
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@cindex OpenRISC opcode summary
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@cindex opcode summary, OpenRISC
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@cindex mnemonics, OpenRISC
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@cindex instruction summary, LM32
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For detailed information on the OpenRISC machine instruction set, see
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@url{http://www.openrisc.io/architecture/}.
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@code{@value{AS}} implements all the standard OpenRISC opcodes.
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