Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/m32r/lock.cgs
2023-03-06 14:48:14 +01:00

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# m32r testcase for lock $dr,@$sr
# mach(): m32r m32rx
.include "testutils.inc"
start
.global lock
lock:
mvaddr_h_gr r4, data_loc
mvi_h_gr r5, 0
lock r5, @r4
test_h_gr r5, 0x12345678
; There is no way to test the lock bit
unlock r5, @r4 ; Unlock the processor
pass
data_loc:
.word 0x12345678