Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/m32r/cmpu.cgs
2023-03-06 14:48:14 +01:00

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# m32r testcase for cmpu $src1,$src2
# mach(): m32r m32rx
.include "testutils.inc"
start
.global cmpu
cmpu:
mvi_h_condbit 0
mvi_h_gr r4, 1
mvi_h_gr r5, -2
cmpu r4, r5
bc ok
not_ok:
fail
ok:
mvi_h_condbit 1
mvi_h_gr r4, -1
cmpu r4, r5
bc not_ok
pass