Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/frv/stq.cgs
2023-03-06 14:48:14 +01:00

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# frv testcase for stq $GRk,@($GRi,$GRj)
# mach: frv
# as(frv): -mcpu=frv
.include "testutils.inc"
start
.global stq
stq:
set_mem_limmed 0xbeef,0xdead,sp
inc_gr_immed -4,sp
set_mem_limmed 0xdead,0xbeef,sp
inc_gr_immed -4,sp
set_mem_limmed 0xdead,0xdead,sp
inc_gr_immed -4,sp
set_mem_limmed 0xbeef,0xbeef,sp
set_gr_immed 0,gr7
set_gr_limmed 0xbeef,0xdead,gr8
set_gr_limmed 0xdead,0xbeef,gr9
set_gr_limmed 0xdead,0xdead,gr10
set_gr_limmed 0xbeef,0xbeef,gr11
stq gr8,@(sp,gr7)
test_mem_limmed 0xbeef,0xdead,sp
inc_gr_immed 4,sp
test_mem_limmed 0xdead,0xbeef,sp
inc_gr_immed 4,sp
test_mem_limmed 0xdead,0xdead,sp
inc_gr_immed 4,sp
test_mem_limmed 0xbeef,0xbeef,sp
set_mem_limmed 0xbeef,0xdead,sp
inc_gr_immed -4,sp
set_mem_limmed 0xdead,0xbeef,sp
inc_gr_immed -4,sp
set_mem_limmed 0xdead,0xdead,sp
inc_gr_immed -4,sp
set_mem_limmed 0xbeef,0xbeef,sp
set_gr_gr sp,gr4 ; sp is gr1
set_gr_limmed 0xbeef,0xdead,gr0
set_gr_limmed 0xdead,0xbeef,gr1
set_gr_limmed 0xdead,0xdead,gr2
set_gr_limmed 0xbeef,0xbeef,gr3
stq gr0,@(gr4,gr7)
test_mem_immed 0,gr4
inc_gr_immed 4,gr4
test_mem_immed 0,gr4
inc_gr_immed 4,gr4
test_mem_immed 0,gr4
inc_gr_immed 4,gr4
test_mem_immed 0,gr4
pass