Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/frv/stc.cgs
2023-03-06 14:48:14 +01:00

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# frv testcase for stc $CPRk,@($GRi,$GRj)
# mach: frv
# as(frv): -mcpu=frv
.include "testutils.inc"
start
.global stc
stc:
set_mem_limmed 0xdead,0xbeef,sp
set_gr_immed 0,gr7
set_cpr_limmed 0xffff,0xffff,cpr8
stc cpr8,@(sp,gr7)
test_mem_limmed 0xffff,0xffff,sp
pass