Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/frv/sracc.cgs
2023-03-06 14:48:14 +01:00

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# frv testcase for sracc $GRi,$GRj,$GRk,$ICCi_1
# mach: all
.include "testutils.inc"
start
.global sracc
sracc:
set_gr_limmed 0xdead,0xbee0,gr7 ; Shift by 0
set_gr_limmed 0x8000,0x0000,gr8
set_icc 0x05,0 ; Set mask opposite of expected
sracc gr8,gr7,gr8,icc0
test_icc 1 0 0 0 icc0
test_gr_limmed 0x8000,0x0000,gr8
set_gr_limmed 0xdead,0xbee1,gr7 ; Shift by 1
set_gr_limmed 0x8000,0x0000,gr8
set_icc 0x07,0 ; Set mask opposite of expected
sracc gr8,gr7,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_limmed 0xc000,0x0000,gr8
set_gr_limmed 0xdead,0xbeff,gr7 ; Shift by 31
set_gr_limmed 0x8000,0x0000,gr8
set_icc 0x07,0 ; Set mask opposite of expected
sracc gr8,gr7,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_immed -1,gr8
set_gr_limmed 0xdead,0xbeff,gr7 ; clear register
set_gr_limmed 0x4000,0x0000,gr8
set_icc 0x0a,0 ; Set mask opposite of expected
sracc gr8,gr7,gr8,icc0
test_icc 0 1 1 1 icc0
test_gr_immed 0x00000000,gr8
pass