Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/frv/ldqf.cgs
2023-03-06 14:48:14 +01:00

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# frv testcase for ldqf @($GRi,$GRj),$GRk
# mach: frv
# as(frv): -mcpu=frv
.include "testutils.inc"
start
.global ldqf
ldqf:
set_mem_limmed 0xdead,0xbeef,sp
inc_gr_immed -4,sp
set_mem_limmed 0xbeef,0xdead,sp
inc_gr_immed -4,sp
set_mem_limmed 0x1234,0x5678,sp
inc_gr_immed -4,sp
set_mem_limmed 0x9abc,0xdef0,sp
set_fr_iimmed 0xdead,0xbeef,fr8
set_fr_iimmed 0xbeef,0xdead,fr9
set_fr_iimmed 0x1234,0x5678,fr10
set_fr_iimmed 0x9abc,0xdef0,fr11
set_gr_immed 0,gr7
; loading into fr0 is business as usual
ldqf @(sp,gr7),fr0
test_fr_limmed 0x9abc,0xdef0,fr0
test_fr_limmed 0x1234,0x5678,fr1
test_fr_limmed 0xbeef,0xdead,fr2
test_fr_limmed 0xdead,0xbeef,fr3
ldqf @(sp,gr7),fr8
test_fr_limmed 0x9abc,0xdef0,fr8
test_fr_limmed 0x1234,0x5678,fr9
test_fr_limmed 0xbeef,0xdead,fr10
test_fr_limmed 0xdead,0xbeef,fr11
set_fr_iimmed 0xdead,0xbeef,fr8
set_fr_iimmed 0xbeef,0xdead,fr9
set_fr_iimmed 0x1234,0x5678,fr10
set_fr_iimmed 0x9abc,0xdef0,fr11
inc_gr_immed -16,sp
set_gr_immed 16,gr7
ldqf @(sp,gr7),fr8
test_fr_limmed 0x9abc,0xdef0,fr8
test_fr_limmed 0x1234,0x5678,fr9
test_fr_limmed 0xbeef,0xdead,fr10
test_fr_limmed 0xdead,0xbeef,fr11
set_fr_iimmed 0xdead,0xbeef,fr8
set_fr_iimmed 0xbeef,0xdead,fr9
set_fr_iimmed 0x1234,0x5678,fr10
set_fr_iimmed 0x9abc,0xdef0,fr11
inc_gr_immed 32,sp
set_gr_immed -16,gr7
ldqf @(sp,gr7),fr8
test_fr_limmed 0x9abc,0xdef0,fr8
test_fr_limmed 0x1234,0x5678,fr9
test_fr_limmed 0xbeef,0xdead,fr10
test_fr_limmed 0xdead,0xbeef,fr11
pass