Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/frv/ldc.cgs
2023-03-06 14:48:14 +01:00

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# frv testcase for ldc @($GRi,$GRj),$GRk
# mach: frv
# as(frv): -mcpu=frv
.include "testutils.inc"
start
.global ldc
ldc:
set_mem_limmed 0xdead,0xbeef,sp
set_cpr_limmed 0xbeef,0xdead,cpr8
set_gr_immed 0,gr7
ldc @(sp,gr7),cpr8
test_cpr_limmed 0xdead,0xbeef,cpr8
set_cpr_limmed 0xbeef,0xdead,cpr8
inc_gr_immed -4,sp
set_gr_immed 4,gr7
ldc @(sp,gr7),cpr8
test_cpr_limmed 0xdead,0xbeef,cpr8
set_cpr_limmed 0xbeef,0xdead,cpr8
inc_gr_immed 8,sp
set_gr_immed -4,gr7
ldc @(sp,gr7),cpr8
test_cpr_limmed 0xdead,0xbeef,cpr8
pass