Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/frv/dci.cgs
2023-03-06 14:48:14 +01:00

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# FRV testcase for dci @(GRi,GRj)
# mach: all
.include "testutils.inc"
start
.global dci
dci:
or_spr_immed 0x08000000,hsr0 ; data cache: copy-back mode
set_mem_immed 0xdeadbeef,sp
test_mem_immed 0xdeadbeef,sp
flush_data_cache sp
set_mem_immed 0xbeefdead,sp
test_mem_immed 0xbeefdead,sp
dci @(sp,gr0)
test_mem_immed 0xdeadbeef,sp
pass