Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/cr16/loadd.cgs
2023-03-06 14:48:14 +01:00

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# cr16 testcase for loadd 0(regp),regp
# mach(): cr16
.include "testutils.inc"
start
.global ldb
ldb:
movd $data_loc, (r4,r3)
movd $0,(r6,r5)
loadd 0(r4,r3),(r6,r5)
test_h_grp "(r6, r5)", 0x12345678 # little endian processor
pass
data_loc:
.long 0x12345678