Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/arm/smlal.cgs
2023-03-06 14:48:14 +01:00

12 lines
165 B
Text

# arm testcase for smlal$cond${set-cc?} $rdlo,$rdhi,$rm,$rs
# mach: unfinished
.include "testutils.inc"
start
.global smlal
smlal:
smlal00 pc,pc,pc,pc
pass