91 lines
1.4 KiB
ArmAsm
91 lines
1.4 KiB
ArmAsm
# mach: aarch64
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# Check the bitwise vector instructions: bif, bit, bsl, eor.
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.include "testutils.inc"
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.data
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.align 4
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inputa:
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.word 0x04030201
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.word 0x08070605
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.word 0x0c0b0a09
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.word 0x100f0e0d
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inputb:
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.word 0x40302010
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.word 0x80706050
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.word 0xc0b0a090
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.word 0x01f0e0d0
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mask:
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.word 0xFF00FF00
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.word 0x00FF00FF
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.word 0xF0F0F0F0
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.word 0x0F0F0F0F
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start
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adrp x0, inputa
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ldr q0, [x0, #:lo12:inputa]
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adrp x0, inputb
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ldr q1, [x0, #:lo12:inputb]
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adrp x0, mask
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ldr q2, [x0, #:lo12:mask]
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mov v3.8b, v0.8b
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bif v3.8b, v1.8b, v2.8b
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addv b4, v3.8b
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mov x1, v4.d[0]
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cmp x1, #50
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bne .Lfailure
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mov v3.16b, v0.16b
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bif v3.16b, v1.16b, v2.16b
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addv b4, v3.16b
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mov x1, v4.d[0]
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cmp x1, #252
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bne .Lfailure
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mov v3.8b, v0.8b
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bit v3.8b, v1.8b, v2.8b
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addv b4, v3.8b
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mov x1, v4.d[0]
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cmp x1, #50
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bne .Lfailure
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mov v3.16b, v0.16b
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bit v3.16b, v1.16b, v2.16b
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addv b4, v3.16b
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mov x1, v4.d[0]
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cmp x1, #13
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bne .Lfailure
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mov v3.8b, v2.8b
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bsl v3.8b, v0.8b, v1.8b
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addv b4, v3.8b
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mov x1, v4.d[0]
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cmp x1, #50
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bne .Lfailure
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mov v3.16b, v2.16b
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bsl v3.16b, v0.16b, v1.16b
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addv b4, v3.16b
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mov x1, v4.d[0]
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cmp x1, #252
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bne .Lfailure
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mov v3.8b, v0.8b
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eor v3.8b, v1.8b, v2.8b
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addv b4, v3.8b
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mov x1, v4.d[0]
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cmp x1, #252
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bne .Lfailure
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mov v3.16b, v0.16b
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eor v3.16b, v1.16b, v2.16b
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addv b4, v3.16b
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mov x1, v4.d[0]
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cmp x1, #247
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bne .Lfailure
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pass
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.Lfailure:
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fail
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