356 lines
9.1 KiB
C
356 lines
9.1 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _HW_PAL_C_
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#define _HW_PAL_C_
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#ifndef STATIC_INLINE_HW_PAL
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#define STATIC_INLINE_HW_PAL STATIC_INLINE
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#endif
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#include "device_table.h"
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#include "cpu.h"
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#include <string.h>
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#ifdef HAVE_UNISTD_H
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#include <unistd.h>
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#endif
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#include <stdlib.h>
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/* DEVICE
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pal - glue logic device containing assorted junk
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DESCRIPTION
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Typical hardware dependant hack. This device allows the firmware
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to gain access to all the things the firmware needs (but the OS
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doesn't).
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The pal contains the following registers. Except for the interrupt
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level register, each of the below is 8 bytes in size and must be
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accessed using correct alignment. For 16 and 32 bit accesses the
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bytes not directed to the register are ignored:
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|0 reset register (write)
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|4 processor id register (read)
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|8 interrupt port (write)
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|9 interrupt level (write)
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|12 processor count register (read)
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|16 tty input fifo register (read)
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|20 tty input status register (read)
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|24 tty output fifo register (write)
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|28 tty output status register (read)
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Reset register (write) halts the simulator exiting with the
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value written.
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Processor id register (read) returns the processor number (0
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.. N-1) of the processor performing the read.
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The interrupt registers should be accessed as a pair (using a 16 or
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32 bit store). The low byte specifies the interrupt port while the
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high byte specifies the level to drive that port at. By
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convention, the pal's interrupt ports (int0, int1, ...) are wired
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up to the corresponding processor's level sensative external
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interrupt pin. Eg: A two byte write to address 8 of 0x0102
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(big-endian) will result in processor 2's external interrupt pin to
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be asserted.
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Processor count register (read) returns the total number of
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processors active in the current simulation.
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TTY input fifo register (read), if the TTY input status register
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indicates a character is available by being nonzero, returns the
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next available character from the pal's tty input port.
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Similarly, the TTY output fifo register (write), if the TTY output
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status register indicates the output fifo is not full by being
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nonzero, outputs the character written to the tty's output port.
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PROPERTIES
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reg = <address> <size> (required)
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Specify the address (within the parent bus) that this device is to
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live.
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*/
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enum {
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hw_pal_reset_register = 0x0,
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hw_pal_cpu_nr_register = 0x4,
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hw_pal_int_register = 0x8,
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hw_pal_nr_cpu_register = 0xa,
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hw_pal_read_fifo = 0x10,
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hw_pal_read_status = 0x14,
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hw_pal_write_fifo = 0x18,
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hw_pal_write_status = 0x1a,
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hw_pal_address_mask = 0x1f,
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};
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typedef struct _hw_pal_console_buffer {
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char buffer;
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int status;
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} hw_pal_console_buffer;
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typedef struct _hw_pal_device {
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hw_pal_console_buffer input;
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hw_pal_console_buffer output;
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device *disk;
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} hw_pal_device;
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/* check the console for an available character */
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static void
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scan_hw_pal(hw_pal_device *hw_pal)
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{
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char c;
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int count;
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count = sim_io_read_stdin(&c, sizeof(c));
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switch (count) {
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case sim_io_not_ready:
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case sim_io_eof:
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hw_pal->input.buffer = 0;
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hw_pal->input.status = 0;
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break;
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default:
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hw_pal->input.buffer = c;
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hw_pal->input.status = 1;
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}
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}
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/* write the character to the hw_pal */
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static void
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write_hw_pal(hw_pal_device *hw_pal,
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char val)
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{
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sim_io_write_stdout(&val, 1);
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hw_pal->output.buffer = val;
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hw_pal->output.status = 1;
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}
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static unsigned
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hw_pal_io_read_buffer_callback(device *me,
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void *dest,
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int space,
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unsigned_word addr,
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unsigned nr_bytes,
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cpu *processor,
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unsigned_word cia)
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{
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hw_pal_device *hw_pal = (hw_pal_device*)device_data(me);
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unsigned_1 val;
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switch (addr & hw_pal_address_mask) {
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case hw_pal_cpu_nr_register:
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val = cpu_nr(processor);
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DTRACE(pal, ("read - cpu-nr %d\n", val));
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break;
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case hw_pal_nr_cpu_register:
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val = tree_find_integer_property(me, "/openprom/options/smp");
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DTRACE(pal, ("read - nr-cpu %d\n", val));
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break;
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case hw_pal_read_fifo:
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val = hw_pal->input.buffer;
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DTRACE(pal, ("read - input-fifo %d\n", val));
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break;
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case hw_pal_read_status:
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scan_hw_pal(hw_pal);
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val = hw_pal->input.status;
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DTRACE(pal, ("read - input-status %d\n", val));
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break;
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case hw_pal_write_fifo:
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val = hw_pal->output.buffer;
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DTRACE(pal, ("read - output-fifo %d\n", val));
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break;
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case hw_pal_write_status:
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val = hw_pal->output.status;
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DTRACE(pal, ("read - output-status %d\n", val));
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break;
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default:
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val = 0;
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DTRACE(pal, ("read - ???\n"));
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}
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memset(dest, 0, nr_bytes);
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*(unsigned_1*)dest = val;
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return nr_bytes;
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}
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static unsigned
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hw_pal_io_write_buffer_callback(device *me,
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const void *source,
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int space,
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unsigned_word addr,
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unsigned nr_bytes,
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cpu *processor,
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unsigned_word cia)
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{
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hw_pal_device *hw_pal = (hw_pal_device*)device_data(me);
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unsigned_1 *byte = (unsigned_1*)source;
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switch (addr & hw_pal_address_mask) {
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case hw_pal_reset_register:
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cpu_halt(processor, cia, was_exited, byte[0]);
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break;
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case hw_pal_int_register:
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device_interrupt_event(me,
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byte[0], /*port*/
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(nr_bytes > 1 ? byte[1] : 0), /* val */
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processor, cia);
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break;
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case hw_pal_read_fifo:
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hw_pal->input.buffer = byte[0];
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DTRACE(pal, ("write - input-fifo %d\n", byte[0]));
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break;
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case hw_pal_read_status:
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hw_pal->input.status = byte[0];
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DTRACE(pal, ("write - input-status %d\n", byte[0]));
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break;
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case hw_pal_write_fifo:
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write_hw_pal(hw_pal, byte[0]);
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DTRACE(pal, ("write - output-fifo %d\n", byte[0]));
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break;
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case hw_pal_write_status:
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hw_pal->output.status = byte[0];
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DTRACE(pal, ("write - output-status %d\n", byte[0]));
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break;
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}
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return nr_bytes;
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}
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/* instances of the hw_pal device */
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static void
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hw_pal_instance_delete_callback(device_instance *instance)
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{
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/* nothing to delete, the hw_pal is attached to the device */
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return;
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}
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static int
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hw_pal_instance_read_callback(device_instance *instance,
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void *buf,
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unsigned_word len)
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{
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DITRACE(pal, ("read - %s (%ld)", (const char*)buf, (long int)len));
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return sim_io_read_stdin(buf, len);
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}
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static int
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hw_pal_instance_write_callback(device_instance *instance,
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const void *buf,
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unsigned_word len)
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{
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int i;
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const char *chp = buf;
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hw_pal_device *hw_pal = device_instance_data(instance);
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DITRACE(pal, ("write - %s (%ld)", (const char*)buf, (long int)len));
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for (i = 0; i < len; i++)
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write_hw_pal(hw_pal, chp[i]);
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sim_io_flush_stdoutput();
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return i;
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}
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static const device_instance_callbacks hw_pal_instance_callbacks = {
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hw_pal_instance_delete_callback,
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hw_pal_instance_read_callback,
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hw_pal_instance_write_callback,
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};
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static device_instance *
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hw_pal_create_instance(device *me,
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const char *path,
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const char *args)
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{
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return device_create_instance_from(me, NULL,
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device_data(me),
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path, args,
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&hw_pal_instance_callbacks);
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}
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static const device_interrupt_port_descriptor hw_pal_interrupt_ports[] = {
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{ "int", 0, MAX_NR_PROCESSORS },
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{ NULL }
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};
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static void
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hw_pal_attach_address(device *me,
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attach_type attach,
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int space,
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unsigned_word addr,
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unsigned nr_bytes,
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access_type access,
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device *client)
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{
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hw_pal_device *pal = (hw_pal_device*)device_data(me);
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pal->disk = client;
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}
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static device_callbacks const hw_pal_callbacks = {
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{ generic_device_init_address, },
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{ hw_pal_attach_address, }, /* address */
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{ hw_pal_io_read_buffer_callback,
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hw_pal_io_write_buffer_callback, },
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{ NULL, }, /* DMA */
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{ NULL, NULL, hw_pal_interrupt_ports }, /* interrupt */
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{ generic_device_unit_decode,
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generic_device_unit_encode,
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generic_device_address_to_attach_address,
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generic_device_size_to_attach_size },
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hw_pal_create_instance,
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};
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static void *
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hw_pal_create(const char *name,
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const device_unit *unit_address,
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const char *args)
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{
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/* create the descriptor */
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hw_pal_device *hw_pal = ZALLOC(hw_pal_device);
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hw_pal->output.status = 1;
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hw_pal->output.buffer = '\0';
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hw_pal->input.status = 0;
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hw_pal->input.buffer = '\0';
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return hw_pal;
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}
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const device_descriptor hw_pal_device_descriptor[] = {
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{ "pal", hw_pal_create, &hw_pal_callbacks },
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{ NULL },
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};
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#endif /* _HW_PAL_C_ */
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