Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/lm32/cpu.c
2023-03-06 14:48:14 +01:00

76 lines
1.6 KiB
C

/* Misc. support for CPU family lm32bf.
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright 1996-2022 Free Software Foundation, Inc.
This file is part of the GNU simulators.
This file is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#define WANT_CPU lm32bf
#define WANT_CPU_LM32BF
#include "sim-main.h"
#include "cgen-ops.h"
/* Get the value of h-pc. */
USI
lm32bf_h_pc_get (SIM_CPU *current_cpu)
{
return CPU (h_pc);
}
/* Set a value for h-pc. */
void
lm32bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
{
CPU (h_pc) = newval;
}
/* Get the value of h-gr. */
SI
lm32bf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
{
return CPU (h_gr[regno]);
}
/* Set a value for h-gr. */
void
lm32bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
CPU (h_gr[regno]) = newval;
}
/* Get the value of h-csr. */
SI
lm32bf_h_csr_get (SIM_CPU *current_cpu, UINT regno)
{
return CPU (h_csr[regno]);
}
/* Set a value for h-csr. */
void
lm32bf_h_csr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
{
CPU (h_csr[regno]) = newval;
}