Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/common/sim-run.c
2023-03-06 14:48:14 +01:00

53 lines
1.5 KiB
C

/* Generic simulator run.
Copyright (C) 1997-2022 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* This must come before any other includes. */
#include "defs.h"
#include "sim-main.h"
#include "sim-assert.h"
/* Generic implementation of sim_engine_run that works within the
sim_engine setjmp/longjmp framework. */
#define IMEM XCONCAT
void
sim_engine_run (SIM_DESC sd,
int next_cpu_nr, /* ignore */
int nr_cpus, /* ignore */
int siggnal) /* ignore */
{
sim_cia cia;
sim_cpu *cpu;
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
cpu = STATE_CPU (sd, 0);
cia = CPU_PC_GET (cpu);
while (1)
{
instruction_word insn = IMEM32 (cia);
cia = idecode_issue (sd, insn, cia);
/* process any events */
if (sim_events_tick (sd))
{
CPU_PC_SET (cpu, cia);
sim_events_process (sd);
}
}
}