60 lines
1.6 KiB
Makefile
60 lines
1.6 KiB
Makefile
#name: PR ld/20830 (.plt.got)
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#as: --32
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#ld: -melf_i386 -shared -z relro --ld-generated-unwind-info --hash-style=sysv -z noseparate-code $NO_DT_RELR_LDFLAGS
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#objdump: -dw -Wf
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.*: +file format .*
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Contents of the .eh_frame section:
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0+ 00000014 00000000 CIE
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Version: 1
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Augmentation: "zR"
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Code alignment factor: 1
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Data alignment factor: -4
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Return address column: 8
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Augmentation data: 1b
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DW_CFA_def_cfa: r4 \(esp\) ofs 4
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DW_CFA_offset: r8 \(eip\) at cfa-4
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DW_CFA_nop
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DW_CFA_nop
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0+18 00000010 0000001c FDE cie=00000000 pc=00000128..00000133
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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0+2c 00000020 00000030 FDE cie=00000000 pc=00000110..00000120
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DW_CFA_def_cfa_offset: 8
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DW_CFA_advance_loc: 6 to 00000116
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DW_CFA_def_cfa_offset: 12
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DW_CFA_advance_loc: 10 to 00000120
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DW_CFA_def_cfa_expression \(DW_OP_breg4 \(esp\): 4; DW_OP_breg8 \(eip\): 0; DW_OP_lit15; DW_OP_and; DW_OP_lit11; DW_OP_ge; DW_OP_lit2; DW_OP_shl; DW_OP_plus\)
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0+50 00000010 00000054 FDE cie=00000000 pc=00000120..00000128
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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Disassembly of section .plt:
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0+110 <.plt>:
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+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
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+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
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+[a-f0-9]+: 00 00 add %al,\(%eax\)
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...
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Disassembly of section .plt.got:
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0+120 <func@plt>:
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+[a-f0-9]+: ff a3 fc ff ff ff jmp \*-0x4\(%ebx\)
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+[a-f0-9]+: 66 90 xchg %ax,%ax
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Disassembly of section .text:
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0+128 <foo>:
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+[a-f0-9]+: e8 f3 ff ff ff call 120 <func@plt>
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+[a-f0-9]+: 8b 83 fc ff ff ff mov -0x4\(%ebx\),%eax
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#pass
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