Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/cpu/mep-sample-ucidsp.cpu
2023-03-06 14:48:14 +01:00

120 lines
4.1 KiB
Scheme

; Toshiba MeP Media Engine architecture description. -*- Scheme -*-
; Copyright 2011 Free Software Foundation, Inc.
;
; Contributed by Red Hat Inc;
;
; This file is part of the GNU Binutils.
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
; MA 02110-1301, USA.
; This file provides sample definitions for the UCI and DSP
; instructions. It is incorporated into the overall description by
; including it from a top-level file that includes all of the required
; option files.
; UCI option.
(define-pmacro mep-ext1-isa () (ISA ext_core1))
; uci instructions for ELFextension test
; uci.elfext.1 $simm16
; 1111_IIII_0000_0010 0001_iiii_iiii_iiii
; simm16 = I[4:7]||i[20:31]
; uci.elfext.2 $uimm16
; 1111_IIII_0000_0010 0010_iiii_iiii_iiii
; uimm16 = I[4:7]||i[20:31]
; define simm16
(df f-uci_elfext_1-hi "uci_elfext_1 simm16 hi 4s7" (mep-ext1-isa) 4 4 INT #f #f)
(df f-uci_elfext_1-lo "uci_elfext_1 simm16 lo 20s31" (mep-ext1-isa) 20 12 UINT #f #f)
(define-multi-ifield
(name f-uci_elfext_1)
(comment "16-bits uci_elfext_ signed constant")
(attrs mep-ext1-isa)
(mode INT)
(subfields f-uci_elfext_1-hi f-uci_elfext_1-lo)
(insert (sequence ()
(set (ifield f-uci_elfext_1-hi) (srl (ifield f-uci_elfext_1) 12))
(set (ifield f-uci_elfext_1-lo) (and (ifield f-uci_elfext_1) #xfff))))
(extract (set (ifield f-uci_elfext_1)
(or (sll (ifield f-uci_elfext_1-hi) 12)
(ifield f-uci_elfext_1-lo))))
)
(dpop uci_elfext_1simm16 "signed imm (16 bits)" (mep-ext1-isa) h-sint f-uci_elfext_1 "signed16")
; define uimm16
(df f-uci_elfext_2-hi "uci_elfext_2 uimm16 hi 4u7" (mep-ext1-isa) 4 4 UINT #f #f)
(df f-uci_elfext_2-lo "uci_elfext_2 uimm16 lo 20u31" (mep-ext1-isa) 20 12 UINT #f #f)
(define-multi-ifield
(name f-uci_elfext_2)
(comment "16-bits uci_elfext_ unsigned constant")
(attrs mep-ext1-isa)
(mode UINT)
(subfields f-uci_elfext_2-hi f-uci_elfext_2-lo)
(insert (sequence ()
(set (ifield f-uci_elfext_2-hi) (srl (ifield f-uci_elfext_2) 12))
(set (ifield f-uci_elfext_2-lo) (and (ifield f-uci_elfext_2) #xfff))))
(extract (set (ifield f-uci_elfext_2)
(or (sll (ifield f-uci_elfext_2-hi) 12)
(ifield f-uci_elfext_2-lo))))
)
(dpop uci_elfext_2uimm16 "unsigned imm (16 bits)" (mep-ext1-isa) h-uint f-uci_elfext_2 "unsigned16")
; define sub-opcode
(df f-uci_elfext-sub "sub-opcode for uci_elfext instructions" (mep-ext1-isa) 16 4 UINT #f #f)
; define instruction
(dni uci.elfext.1 "uci_elfext instruction 1" (OPTIONAL_UCI_INSN VOLATILE mep-ext1-isa)
"uci.elfext.1 $uci_elfext_1simm16"
(+ MAJ_15 (f-rm 0) (f-sub4 2) (f-uci_elfext-sub 1) uci_elfext_1simm16)
(c-call "check_option_uci" pc)
()
)
; define instruction
(dni uci.elfext.2 "uci_elfext instruction 1" (OPTIONAL_UCI_INSN VOLATILE mep-ext1-isa)
"uci.elfext.2 $uci_elfext_2uimm16"
(+ MAJ_15 (f-rm 0) (f-sub4 2) (f-uci_elfext-sub 2) uci_elfext_2uimm16)
(c-call "check_option_uci" pc)
()
)
;; some general samples
; UCI option.
(dni uci "user defined instruction" (OPTIONAL_UCI_INSN mep-ext1-isa)
"uci $rn,$rm,$code16"
(+ MAJ_15 rn rm (f-sub4 2) code16)
(sequence ()
(c-call "check_option_uci" pc)
(unimp "uci"))
())
; DSP option.
(dni dsp "dsp instruction" (OPTIONAL_DSP_INSN mep-ext1-isa)
"dsp $rn,$rm,$code16"
(+ MAJ_15 rn rm (f-sub4 0) code16)
(sequence ()
(c-call "check_option_dsp" pc)
(set pc (c-call USI "dsp_exception" pc)))
())