560 lines
19 KiB
C
560 lines
19 KiB
C
/* BFD support for the ARM processor
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Copyright (C) 1994-2022 Free Software Foundation, Inc.
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Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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#include "libiberty.h"
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#include "cpu-arm.h"
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/* This routine is provided two arch_infos and works out which ARM
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machine which would be compatible with both and returns a pointer
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to its info structure. */
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static const bfd_arch_info_type *
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compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
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{
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/* If a & b are for different architecture we can do nothing. */
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if (a->arch != b->arch)
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return NULL;
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/* If a & b are for the same machine then all is well. */
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if (a->mach == b->mach)
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return a;
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/* Otherwise if either a or b is the 'default' machine
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then it can be polymorphed into the other. */
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if (a->the_default)
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return b;
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if (b->the_default)
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return a;
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/* So far all newer ARM architecture cores are
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supersets of previous cores. */
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if (a->mach < b->mach)
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return b;
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else if (a->mach > b->mach)
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return a;
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/* Never reached! */
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return NULL;
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}
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static struct
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{
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unsigned int mach;
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char * name;
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}
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processors[] =
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{
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{ bfd_mach_arm_2, "arm2" },
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{ bfd_mach_arm_2a, "arm250" },
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{ bfd_mach_arm_2a, "arm3" },
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{ bfd_mach_arm_3, "arm6" },
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{ bfd_mach_arm_3, "arm60" },
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{ bfd_mach_arm_3, "arm600" },
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{ bfd_mach_arm_3, "arm610" },
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{ bfd_mach_arm_3, "arm620" },
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{ bfd_mach_arm_3, "arm7" },
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{ bfd_mach_arm_3, "arm70" },
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{ bfd_mach_arm_3, "arm700" },
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{ bfd_mach_arm_3, "arm700i" },
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{ bfd_mach_arm_3, "arm710" },
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{ bfd_mach_arm_3, "arm7100" },
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{ bfd_mach_arm_3, "arm710c" },
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{ bfd_mach_arm_4T, "arm710t" },
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{ bfd_mach_arm_3, "arm720" },
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{ bfd_mach_arm_4T, "arm720t" },
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{ bfd_mach_arm_4T, "arm740t" },
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{ bfd_mach_arm_3, "arm7500" },
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{ bfd_mach_arm_3, "arm7500fe" },
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{ bfd_mach_arm_3, "arm7d" },
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{ bfd_mach_arm_3, "arm7di" },
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{ bfd_mach_arm_3M, "arm7dm" },
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{ bfd_mach_arm_3M, "arm7dmi" },
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{ bfd_mach_arm_4T, "arm7t" },
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{ bfd_mach_arm_4T, "arm7tdmi" },
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{ bfd_mach_arm_4T, "arm7tdmi-s" },
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{ bfd_mach_arm_3M, "arm7m" },
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{ bfd_mach_arm_4, "arm8" },
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{ bfd_mach_arm_4, "arm810" },
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{ bfd_mach_arm_4, "arm9" },
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{ bfd_mach_arm_4T, "arm920" },
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{ bfd_mach_arm_4T, "arm920t" },
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{ bfd_mach_arm_4T, "arm922t" },
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{ bfd_mach_arm_5TEJ, "arm926ej" },
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{ bfd_mach_arm_5TEJ, "arm926ejs" },
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{ bfd_mach_arm_5TEJ, "arm926ej-s" },
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{ bfd_mach_arm_4T, "arm940t" },
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{ bfd_mach_arm_5TE, "arm946e" },
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{ bfd_mach_arm_5TE, "arm946e-r0" },
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{ bfd_mach_arm_5TE, "arm946e-s" },
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{ bfd_mach_arm_5TE, "arm966e" },
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{ bfd_mach_arm_5TE, "arm966e-r0" },
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{ bfd_mach_arm_5TE, "arm966e-s" },
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{ bfd_mach_arm_5TE, "arm968e-s" },
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{ bfd_mach_arm_5TE, "arm9e" },
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{ bfd_mach_arm_5TE, "arm9e-r0" },
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{ bfd_mach_arm_4T, "arm9tdmi" },
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{ bfd_mach_arm_5TE, "arm1020" },
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{ bfd_mach_arm_5T, "arm1020t" },
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{ bfd_mach_arm_5TE, "arm1020e" },
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{ bfd_mach_arm_5TE, "arm1022e" },
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{ bfd_mach_arm_5TEJ, "arm1026ejs" },
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{ bfd_mach_arm_5TEJ, "arm1026ej-s" },
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{ bfd_mach_arm_5TE, "arm10e" },
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{ bfd_mach_arm_5T, "arm10t" },
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{ bfd_mach_arm_5T, "arm10tdmi" },
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{ bfd_mach_arm_6, "arm1136j-s" },
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{ bfd_mach_arm_6, "arm1136js" },
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{ bfd_mach_arm_6, "arm1136jf-s" },
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{ bfd_mach_arm_6, "arm1136jfs" },
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{ bfd_mach_arm_6KZ, "arm1176jz-s" },
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{ bfd_mach_arm_6KZ, "arm1176jzf-s" },
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{ bfd_mach_arm_6T2, "arm1156t2-s" },
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{ bfd_mach_arm_6T2, "arm1156t2f-s" },
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{ bfd_mach_arm_7, "cortex-a5" },
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{ bfd_mach_arm_7, "cortex-a7" },
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{ bfd_mach_arm_7, "cortex-a8" },
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{ bfd_mach_arm_7, "cortex-a9" },
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{ bfd_mach_arm_7, "cortex-a12" },
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{ bfd_mach_arm_7, "cortex-a15" },
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{ bfd_mach_arm_7, "cortex-a17" },
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{ bfd_mach_arm_8, "cortex-a32" },
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{ bfd_mach_arm_8, "cortex-a35" },
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{ bfd_mach_arm_8, "cortex-a53" },
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{ bfd_mach_arm_8, "cortex-a55" },
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{ bfd_mach_arm_8, "cortex-a57" },
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{ bfd_mach_arm_8, "cortex-a72" },
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{ bfd_mach_arm_8, "cortex-a73" },
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{ bfd_mach_arm_8, "cortex-a75" },
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{ bfd_mach_arm_8, "cortex-a76" },
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{ bfd_mach_arm_8, "cortex-a76ae" },
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{ bfd_mach_arm_8, "cortex-a77" },
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{ bfd_mach_arm_8, "cortex-a78" },
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{ bfd_mach_arm_8, "cortex-a78ae" },
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{ bfd_mach_arm_8, "cortex-a78c" },
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{ bfd_mach_arm_6SM, "cortex-m0" },
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{ bfd_mach_arm_6SM, "cortex-m0plus" },
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{ bfd_mach_arm_6SM, "cortex-m1" },
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{ bfd_mach_arm_8M_BASE, "cortex-m23" },
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{ bfd_mach_arm_7, "cortex-m3" },
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{ bfd_mach_arm_8M_MAIN, "cortex-m33" },
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{ bfd_mach_arm_8M_MAIN, "cortex-m35p" },
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{ bfd_mach_arm_7EM, "cortex-m4" },
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{ bfd_mach_arm_7EM, "cortex-m7" },
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{ bfd_mach_arm_7, "cortex-r4" },
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{ bfd_mach_arm_7, "cortex-r4f" },
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{ bfd_mach_arm_7, "cortex-r5" },
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{ bfd_mach_arm_8R, "cortex-r52" },
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{ bfd_mach_arm_8R, "cortex-r52plus" },
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{ bfd_mach_arm_7, "cortex-r7" },
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{ bfd_mach_arm_7, "cortex-r8" },
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{ bfd_mach_arm_8, "cortex-x1" },
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{ bfd_mach_arm_4T, "ep9312" },
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{ bfd_mach_arm_8, "exynos-m1" },
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{ bfd_mach_arm_4, "fa526" },
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{ bfd_mach_arm_5TE, "fa606te" },
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{ bfd_mach_arm_5TE, "fa616te" },
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{ bfd_mach_arm_4, "fa626" },
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{ bfd_mach_arm_5TE, "fa626te" },
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{ bfd_mach_arm_5TE, "fa726te" },
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{ bfd_mach_arm_5TE, "fmp626" },
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{ bfd_mach_arm_XScale, "i80200" },
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{ bfd_mach_arm_7, "marvell-pj4" },
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{ bfd_mach_arm_7, "marvell-whitney" },
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{ bfd_mach_arm_6K, "mpcore" },
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{ bfd_mach_arm_6K, "mpcorenovfp" },
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{ bfd_mach_arm_4, "sa1" },
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{ bfd_mach_arm_4, "strongarm" },
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{ bfd_mach_arm_4, "strongarm1" },
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{ bfd_mach_arm_4, "strongarm110" },
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{ bfd_mach_arm_4, "strongarm1100" },
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{ bfd_mach_arm_4, "strongarm1110" },
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{ bfd_mach_arm_XScale, "xscale" },
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{ bfd_mach_arm_8, "xgene1" },
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{ bfd_mach_arm_8, "xgene2" },
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{ bfd_mach_arm_9, "cortex-a710" },
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{ bfd_mach_arm_ep9312, "ep9312" },
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{ bfd_mach_arm_iWMMXt, "iwmmxt" },
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{ bfd_mach_arm_iWMMXt2, "iwmmxt2" },
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{ bfd_mach_arm_unknown, "arm_any" }
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};
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static bool
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scan (const struct bfd_arch_info *info, const char *string)
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{
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int i;
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/* First test for an exact match. */
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if (strcasecmp (string, info->printable_name) == 0)
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return true;
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/* Next check for a processor name instead of an Architecture name. */
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for (i = sizeof (processors) / sizeof (processors[0]); i--;)
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{
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if (strcasecmp (string, processors [i].name) == 0)
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break;
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}
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if (i != -1 && info->mach == processors [i].mach)
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return true;
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/* Finally check for the default architecture. */
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if (strcasecmp (string, "arm") == 0)
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return info->the_default;
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return false;
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}
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#define N(number, print, default, next) \
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{ 32, 32, 8, bfd_arch_arm, number, "arm", print, 4, default, compatible, \
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scan, bfd_arch_default_fill, next, 0 }
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static const bfd_arch_info_type arch_info_struct[] =
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{
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N (bfd_mach_arm_2, "armv2", false, & arch_info_struct[1]),
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N (bfd_mach_arm_2a, "armv2a", false, & arch_info_struct[2]),
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N (bfd_mach_arm_3, "armv3", false, & arch_info_struct[3]),
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N (bfd_mach_arm_3M, "armv3m", false, & arch_info_struct[4]),
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N (bfd_mach_arm_4, "armv4", false, & arch_info_struct[5]),
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N (bfd_mach_arm_4T, "armv4t", false, & arch_info_struct[6]),
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N (bfd_mach_arm_5, "armv5", false, & arch_info_struct[7]),
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N (bfd_mach_arm_5T, "armv5t", false, & arch_info_struct[8]),
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N (bfd_mach_arm_5TE, "armv5te", false, & arch_info_struct[9]),
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N (bfd_mach_arm_XScale, "xscale", false, & arch_info_struct[10]),
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N (bfd_mach_arm_ep9312, "ep9312", false, & arch_info_struct[11]),
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N (bfd_mach_arm_iWMMXt, "iwmmxt", false, & arch_info_struct[12]),
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N (bfd_mach_arm_iWMMXt2, "iwmmxt2", false, & arch_info_struct[13]),
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N (bfd_mach_arm_5TEJ, "armv5tej", false, & arch_info_struct[14]),
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N (bfd_mach_arm_6, "armv6", false, & arch_info_struct[15]),
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N (bfd_mach_arm_6KZ, "armv6kz", false, & arch_info_struct[16]),
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N (bfd_mach_arm_6T2, "armv6t2", false, & arch_info_struct[17]),
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N (bfd_mach_arm_6K, "armv6k", false, & arch_info_struct[18]),
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N (bfd_mach_arm_7, "armv7", false, & arch_info_struct[19]),
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N (bfd_mach_arm_6M, "armv6-m", false, & arch_info_struct[20]),
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N (bfd_mach_arm_6SM, "armv6s-m", false, & arch_info_struct[21]),
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N (bfd_mach_arm_7EM, "armv7e-m", false, & arch_info_struct[22]),
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N (bfd_mach_arm_8, "armv8-a", false, & arch_info_struct[23]),
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N (bfd_mach_arm_8R, "armv8-r", false, & arch_info_struct[24]),
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N (bfd_mach_arm_8M_BASE, "armv8-m.base", false, & arch_info_struct[25]),
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N (bfd_mach_arm_8M_MAIN, "armv8-m.main", false, & arch_info_struct[26]),
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N (bfd_mach_arm_8_1M_MAIN, "armv8.1-m.main", false, & arch_info_struct[27]),
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N (bfd_mach_arm_9, "armv9-a", false, & arch_info_struct[28]),
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N (bfd_mach_arm_unknown, "arm_any", false, NULL)
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};
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const bfd_arch_info_type bfd_arm_arch =
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N (0, "arm", true, & arch_info_struct[0]);
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/* Support functions used by both the COFF and ELF versions of the ARM port. */
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/* Handle the merging of the 'machine' settings of input file IBFD
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and an output file OBFD. These values actually represent the
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different possible ARM architecture variants.
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Returns TRUE if they were merged successfully or FALSE otherwise. */
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bool
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bfd_arm_merge_machines (bfd *ibfd, bfd *obfd)
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{
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unsigned int in = bfd_get_mach (ibfd);
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unsigned int out = bfd_get_mach (obfd);
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/* If the output architecture is unknown, we now have a value to set. */
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if (out == bfd_mach_arm_unknown)
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bfd_set_arch_mach (obfd, bfd_arch_arm, in);
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/* If the input architecture is unknown,
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then so must be the output architecture. */
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else if (in == bfd_mach_arm_unknown)
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/* FIXME: We ought to have some way to
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override this on the command line. */
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bfd_set_arch_mach (obfd, bfd_arch_arm, bfd_mach_arm_unknown);
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/* If they are the same then nothing needs to be done. */
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else if (out == in)
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;
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/* Otherwise the general principle that a earlier architecture can be
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linked with a later architecture to produce a binary that will execute
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on the later architecture.
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We fail however if we attempt to link a Cirrus EP9312 binary with an
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Intel XScale binary, since these architecture have co-processors which
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will not both be present on the same physical hardware. */
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else if (in == bfd_mach_arm_ep9312
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&& (out == bfd_mach_arm_XScale
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|| out == bfd_mach_arm_iWMMXt
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|| out == bfd_mach_arm_iWMMXt2))
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{
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/* xgettext: c-format */
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_bfd_error_handler (_("error: %pB is compiled for the EP9312, "
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"whereas %pB is compiled for XScale"),
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ibfd, obfd);
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bfd_set_error (bfd_error_wrong_format);
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return false;
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}
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else if (out == bfd_mach_arm_ep9312
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&& (in == bfd_mach_arm_XScale
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|| in == bfd_mach_arm_iWMMXt
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|| in == bfd_mach_arm_iWMMXt2))
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{
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/* xgettext: c-format */
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_bfd_error_handler (_("error: %pB is compiled for the EP9312, "
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"whereas %pB is compiled for XScale"),
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obfd, ibfd);
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bfd_set_error (bfd_error_wrong_format);
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return false;
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}
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else if (in > out)
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bfd_set_arch_mach (obfd, bfd_arch_arm, in);
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/* else
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Nothing to do. */
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return true;
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}
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typedef struct
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{
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unsigned char namesz[4]; /* Size of entry's owner string. */
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unsigned char descsz[4]; /* Size of the note descriptor. */
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unsigned char type[4]; /* Interpretation of the descriptor. */
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char name[1]; /* Start of the name+desc data. */
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} arm_Note;
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static bool
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arm_check_note (bfd *abfd,
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bfd_byte *buffer,
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bfd_size_type buffer_size,
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const char *expected_name,
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char **description_return)
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{
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unsigned long namesz;
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unsigned long descsz;
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unsigned long type;
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char * descr;
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if (buffer_size < offsetof (arm_Note, name))
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return false;
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/* We have to extract the values this way to allow for a
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host whose endian-ness is different from the target. */
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namesz = bfd_get_32 (abfd, buffer);
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descsz = bfd_get_32 (abfd, buffer + offsetof (arm_Note, descsz));
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type = bfd_get_32 (abfd, buffer + offsetof (arm_Note, type));
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descr = (char *) buffer + offsetof (arm_Note, name);
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/* Check for buffer overflow. */
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if (namesz + descsz + offsetof (arm_Note, name) > buffer_size)
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return false;
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if (expected_name == NULL)
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{
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if (namesz != 0)
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return false;
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}
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else
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{
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if (namesz != ((strlen (expected_name) + 1 + 3) & ~3))
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return false;
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if (strcmp (descr, expected_name) != 0)
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return false;
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descr += (namesz + 3) & ~3;
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}
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/* FIXME: We should probably check the type as well. */
|
|
(void) type;
|
|
|
|
if (description_return != NULL)
|
|
* description_return = descr;
|
|
|
|
return true;
|
|
}
|
|
|
|
#define NOTE_ARCH_STRING "arch: "
|
|
|
|
bool
|
|
bfd_arm_update_notes (bfd *abfd, const char *note_section)
|
|
{
|
|
asection * arm_arch_section;
|
|
bfd_size_type buffer_size;
|
|
bfd_byte * buffer;
|
|
char * arch_string;
|
|
char * expected;
|
|
|
|
/* Look for a note section. If one is present check the architecture
|
|
string encoded in it, and set it to the current architecture if it is
|
|
different. */
|
|
arm_arch_section = bfd_get_section_by_name (abfd, note_section);
|
|
|
|
if (arm_arch_section == NULL)
|
|
return true;
|
|
|
|
buffer_size = arm_arch_section->size;
|
|
if (buffer_size == 0)
|
|
return false;
|
|
|
|
if (!bfd_malloc_and_get_section (abfd, arm_arch_section, &buffer))
|
|
goto FAIL;
|
|
|
|
/* Parse the note. */
|
|
if (! arm_check_note (abfd, buffer, buffer_size, NOTE_ARCH_STRING, & arch_string))
|
|
goto FAIL;
|
|
|
|
/* Check the architecture in the note against the architecture of the bfd.
|
|
Newer architectures versions should not be added here as build attribute
|
|
are a better mechanism to convey ISA used. */
|
|
switch (bfd_get_mach (abfd))
|
|
{
|
|
default:
|
|
case bfd_mach_arm_unknown: expected = "unknown"; break;
|
|
case bfd_mach_arm_2: expected = "armv2"; break;
|
|
case bfd_mach_arm_2a: expected = "armv2a"; break;
|
|
case bfd_mach_arm_3: expected = "armv3"; break;
|
|
case bfd_mach_arm_3M: expected = "armv3M"; break;
|
|
case bfd_mach_arm_4: expected = "armv4"; break;
|
|
case bfd_mach_arm_4T: expected = "armv4t"; break;
|
|
case bfd_mach_arm_5: expected = "armv5"; break;
|
|
case bfd_mach_arm_5T: expected = "armv5t"; break;
|
|
case bfd_mach_arm_5TE: expected = "armv5te"; break;
|
|
case bfd_mach_arm_XScale: expected = "XScale"; break;
|
|
case bfd_mach_arm_ep9312: expected = "ep9312"; break;
|
|
case bfd_mach_arm_iWMMXt: expected = "iWMMXt"; break;
|
|
case bfd_mach_arm_iWMMXt2: expected = "iWMMXt2"; break;
|
|
}
|
|
|
|
if (strcmp (arch_string, expected) != 0)
|
|
{
|
|
strcpy ((char *) buffer + (offsetof (arm_Note, name)
|
|
+ ((strlen (NOTE_ARCH_STRING) + 3) & ~3)),
|
|
expected);
|
|
|
|
if (! bfd_set_section_contents (abfd, arm_arch_section, buffer,
|
|
(file_ptr) 0, buffer_size))
|
|
{
|
|
_bfd_error_handler
|
|
/* xgettext: c-format */
|
|
(_("warning: unable to update contents of %s section in %pB"),
|
|
note_section, abfd);
|
|
goto FAIL;
|
|
}
|
|
}
|
|
|
|
free (buffer);
|
|
return true;
|
|
|
|
FAIL:
|
|
free (buffer);
|
|
return false;
|
|
}
|
|
|
|
|
|
static struct
|
|
{
|
|
const char * string;
|
|
unsigned int mach;
|
|
}
|
|
|
|
/* Newer architectures versions should not be added here as build attribute are
|
|
a better mechanism to convey ISA used. */
|
|
architectures[] =
|
|
{
|
|
{ "armv2", bfd_mach_arm_2 },
|
|
{ "armv2a", bfd_mach_arm_2a },
|
|
{ "armv3", bfd_mach_arm_3 },
|
|
{ "armv3M", bfd_mach_arm_3M },
|
|
{ "armv4", bfd_mach_arm_4 },
|
|
{ "armv4t", bfd_mach_arm_4T },
|
|
{ "armv5", bfd_mach_arm_5 },
|
|
{ "armv5t", bfd_mach_arm_5T },
|
|
{ "armv5te", bfd_mach_arm_5TE },
|
|
{ "XScale", bfd_mach_arm_XScale },
|
|
{ "ep9312", bfd_mach_arm_ep9312 },
|
|
{ "iWMMXt", bfd_mach_arm_iWMMXt },
|
|
{ "iWMMXt2", bfd_mach_arm_iWMMXt2 },
|
|
{ "arm_any", bfd_mach_arm_unknown }
|
|
};
|
|
|
|
/* Extract the machine number stored in a note section. */
|
|
unsigned int
|
|
bfd_arm_get_mach_from_notes (bfd *abfd, const char *note_section)
|
|
{
|
|
asection * arm_arch_section;
|
|
bfd_size_type buffer_size;
|
|
bfd_byte * buffer;
|
|
char * arch_string;
|
|
int i;
|
|
|
|
/* Look for a note section. If one is present check the architecture
|
|
string encoded in it, and set it to the current architecture if it is
|
|
different. */
|
|
arm_arch_section = bfd_get_section_by_name (abfd, note_section);
|
|
|
|
if (arm_arch_section == NULL)
|
|
return bfd_mach_arm_unknown;
|
|
|
|
buffer_size = arm_arch_section->size;
|
|
if (buffer_size == 0)
|
|
return bfd_mach_arm_unknown;
|
|
|
|
if (!bfd_malloc_and_get_section (abfd, arm_arch_section, &buffer))
|
|
goto FAIL;
|
|
|
|
/* Parse the note. */
|
|
if (! arm_check_note (abfd, buffer, buffer_size, NOTE_ARCH_STRING, & arch_string))
|
|
goto FAIL;
|
|
|
|
/* Interpret the architecture string. */
|
|
for (i = ARRAY_SIZE (architectures); i--;)
|
|
if (strcmp (arch_string, architectures[i].string) == 0)
|
|
{
|
|
free (buffer);
|
|
return architectures[i].mach;
|
|
}
|
|
|
|
FAIL:
|
|
free (buffer);
|
|
return bfd_mach_arm_unknown;
|
|
}
|
|
|
|
bool
|
|
bfd_is_arm_special_symbol_name (const char * name, int type)
|
|
{
|
|
/* The ARM compiler outputs several obsolete forms. Recognize them
|
|
in addition to the standard $a, $t and $d. We are somewhat loose
|
|
in what we accept here, since the full set is not documented. */
|
|
if (!name || name[0] != '$')
|
|
return false;
|
|
if (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
|
|
type &= BFD_ARM_SPECIAL_SYM_TYPE_MAP;
|
|
else if (name[1] == 'm' || name[1] == 'f' || name[1] == 'p')
|
|
type &= BFD_ARM_SPECIAL_SYM_TYPE_TAG;
|
|
else if (name[1] >= 'a' && name[1] <= 'z')
|
|
type &= BFD_ARM_SPECIAL_SYM_TYPE_OTHER;
|
|
else
|
|
return false;
|
|
|
|
return (type != 0 && (name[2] == 0 || name[2] == '.'));
|
|
}
|
|
|