Projet_SETI_RISC-V/riscv-gnu-toolchain/qemu/target/alpha/STATUS
2023-03-06 14:48:14 +01:00

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Text

(to be completed)
Alpha emulation structure:
cpu.h : CPU definitions globally exported
exec.h : CPU definitions used only for translated code execution
helper.c : helpers that can be called either by the translated code
or the QEMU core, including the exception handler.
op_helper.c : helpers that can be called only from TCG
helper.h : TCG helpers prototypes
translate.c : Alpha instructions to micro-operations translator
Code translator status:
The Alpha CPU instruction emulation should be quite complete with the
limitation that the VAX floating-point load and stores are not tested.
The 4 MMU modes are implemented.
Linux user mode emulation status:
a few programs start to run. Most crash at a certain point, dereferencing a
NULL pointer. It seems that the UNIQUE register is not initialized properly.
It may appear that old executables, not relying on TLS support, run but
this is to be proved...
Full system emulation status:
* Alpha PALCode emulation is in a very early stage and is not sufficient
to run any real OS. The alpha-softmmu target is not enabled for now.
* no hardware platform description is implemented
* there might be problems in the Alpha PALCode dedicated instructions
that would prevent to use a native PALCode image.