32 lines
1.7 KiB
Makefile
32 lines
1.7 KiB
Makefile
#as: -mevexrcig=rne
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#objdump: -dw
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#name: i386 AVX512ER rcig insns
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#source: avx512er-rcig.s
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.*: +file format .*
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*62 f2 7d 18 c8 f5[ ]*vexp2ps \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 fd 18 c8 f5[ ]*vexp2pd \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 7d 18 ca f5[ ]*vrcp28ps \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 fd 18 ca f5[ ]*vrcp28pd \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 55 1f cb f4[ ]*vrcp28ss \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f cb f4[ ]*vrcp28sd \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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[ ]*[a-f0-9]+:[ ]*62 f2 7d 18 cc f5[ ]*vrsqrt28ps \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 fd 18 cc f5[ ]*vrsqrt28pd \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 55 1f cd f4[ ]*vrsqrt28ss \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f cd f4[ ]*vrsqrt28sd \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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[ ]*[a-f0-9]+:[ ]*62 f2 7d 18 c8 f5[ ]*vexp2ps \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 fd 18 c8 f5[ ]*vexp2pd \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 7d 18 ca f5[ ]*vrcp28ps \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 fd 18 ca f5[ ]*vrcp28pd \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 55 1f cb f4[ ]*vrcp28ss \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f cb f4[ ]*vrcp28sd \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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[ ]*[a-f0-9]+:[ ]*62 f2 7d 18 cc f5[ ]*vrsqrt28ps \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 fd 18 cc f5[ ]*vrsqrt28pd \{sae\},%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 55 1f cd f4[ ]*vrsqrt28ss \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 1f cd f4[ ]*vrsqrt28sd \{sae\},%xmm4,%xmm5,%xmm6\{%k7\}
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#pass
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