Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/sh/fail.s
2023-03-06 14:48:14 +01:00

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180 B
ArmAsm

# sh testcase, fail
# mach: all
# as(sh): -defsym sim_cpu=0
# as(shdsp): -defsym sim_cpu=1 -dsp
# output: fail\n
# status: 1
.include "testutils.inc"
start
fail
exit 0