134 lines
3.6 KiB
C
134 lines
3.6 KiB
C
/* Test case for setting a memory-write unaligned watchpoint on aarch64.
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any damages
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arising from the use of this software.
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Permission is granted to anyone to use this software for any purpose,
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including commercial applications, and to alter it and redistribute it
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freely. */
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#define _GNU_SOURCE 1
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#include <stdlib.h>
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#include <unistd.h>
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#include <sys/ptrace.h>
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#include <asm/ptrace.h>
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#include <assert.h>
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#include <sys/wait.h>
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#include <stddef.h>
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#include <errno.h>
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#include <sys/uio.h>
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#include <elf.h>
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#include <error.h>
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static pid_t child;
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static void
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cleanup (void)
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{
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if (child > 0)
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kill (child, SIGKILL);
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child = 0;
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}
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/* Macros to extract fields from the hardware debug information word. */
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#define AARCH64_DEBUG_NUM_SLOTS(x) ((x) & 0xff)
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#define AARCH64_DEBUG_ARCH(x) (((x) >> 8) & 0xff)
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/* Macro for the expected version of the ARMv8-A debug architecture. */
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#define AARCH64_DEBUG_ARCH_V8 0x6
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#define DR_CONTROL_ENABLED(ctrl) (((ctrl) & 0x1) == 1)
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#define DR_CONTROL_LENGTH(ctrl) (((ctrl) >> 5) & 0xff)
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static void
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set_watchpoint (pid_t pid, volatile void *addr, unsigned len_mask)
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{
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struct user_hwdebug_state dreg_state;
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struct iovec iov;
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long l;
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assert (len_mask >= 0x01);
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assert (len_mask <= 0xff);
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iov.iov_base = &dreg_state;
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iov.iov_len = sizeof (dreg_state);
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errno = 0;
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l = ptrace (PTRACE_GETREGSET, pid, NT_ARM_HW_WATCH, &iov);
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assert (l == 0);
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assert (AARCH64_DEBUG_ARCH (dreg_state.dbg_info) >= AARCH64_DEBUG_ARCH_V8);
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assert (AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info) >= 1);
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assert (!DR_CONTROL_ENABLED (dreg_state.dbg_regs[0].ctrl));
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dreg_state.dbg_regs[0].ctrl |= 1;
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assert ( DR_CONTROL_ENABLED (dreg_state.dbg_regs[0].ctrl));
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assert (DR_CONTROL_LENGTH (dreg_state.dbg_regs[0].ctrl) == 0);
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dreg_state.dbg_regs[0].ctrl |= len_mask << 5;
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assert (DR_CONTROL_LENGTH (dreg_state.dbg_regs[0].ctrl) == len_mask);
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dreg_state.dbg_regs[0].ctrl |= 2 << 3; // write
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dreg_state.dbg_regs[0].ctrl |= 2 << 1; // enabled at el0
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dreg_state.dbg_regs[0].addr = (uintptr_t) addr;
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iov.iov_base = &dreg_state;
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iov.iov_len = (offsetof (struct user_hwdebug_state, dbg_regs)
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+ sizeof (dreg_state.dbg_regs[0]));
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errno = 0;
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l = ptrace (PTRACE_SETREGSET, pid, NT_ARM_HW_WATCH, &iov);
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if (errno != 0)
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error (1, errno, "PTRACE_SETREGSET: NT_ARM_HW_WATCH");
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assert (l == 0);
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}
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static volatile long long check;
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int
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main (void)
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{
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pid_t got_pid;
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int i, status;
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long l;
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atexit (cleanup);
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child = fork ();
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assert (child >= 0);
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if (child == 0)
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{
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l = ptrace (PTRACE_TRACEME, 0, NULL, NULL);
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assert (l == 0);
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i = raise (SIGUSR1);
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assert (i == 0);
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check = -1;
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i = raise (SIGUSR2);
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/* NOTREACHED */
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assert (0);
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}
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got_pid = waitpid (child, &status, 0);
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assert (got_pid == child);
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assert (WIFSTOPPED (status));
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assert (WSTOPSIG (status) == SIGUSR1);
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/* Add a watchpoint to check.
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Restart the child. It will write to check.
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Check child has stopped on the watchpoint. */
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set_watchpoint (child, &check, 0x02);
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errno = 0;
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l = ptrace (PTRACE_CONT, child, 0l, 0l);
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assert_perror (errno);
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assert (l == 0);
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got_pid = waitpid (child, &status, 0);
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assert (got_pid == child);
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assert (WIFSTOPPED (status));
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if (WSTOPSIG (status) == SIGUSR2)
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{
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/* We missed the watchpoint - unsupported by hardware? */
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cleanup ();
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return 2;
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}
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assert (WSTOPSIG (status) == SIGTRAP);
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return 0;
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}
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