194 lines
6.1 KiB
C
194 lines
6.1 KiB
C
/*
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* Samsung exynos4 SoC based boards emulation
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
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* Maksim Kozlov <m.kozlov@samsung.com>
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* Evgeny Voevodin <e.voevodin@samsung.com>
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* Igor Mitsyanko <i.mitsyanko@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "hw/sysbus.h"
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#include "net/net.h"
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#include "hw/arm/boot.h"
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#include "exec/address-spaces.h"
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#include "hw/arm/exynos4210.h"
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#include "hw/net/lan9118.h"
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#include "hw/qdev-properties.h"
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#include "hw/boards.h"
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#include "hw/irq.h"
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#define SMDK_LAN9118_BASE_ADDR 0x05000000
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typedef enum Exynos4BoardType {
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EXYNOS4_BOARD_NURI,
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EXYNOS4_BOARD_SMDKC210,
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EXYNOS4_NUM_OF_BOARDS
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} Exynos4BoardType;
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typedef struct Exynos4BoardState {
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Exynos4210State soc;
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MemoryRegion dram0_mem;
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MemoryRegion dram1_mem;
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} Exynos4BoardState;
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static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = 0xD33,
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[EXYNOS4_BOARD_SMDKC210] = 0xB16,
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};
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static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG,
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[EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
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};
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static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = 1 * GiB,
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[EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
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};
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static struct arm_boot_info exynos4_board_binfo = {
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.loader_start = EXYNOS4210_BASE_BOOT_ADDR,
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.smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
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.write_secondary_boot = exynos4210_write_secondary,
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};
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static void lan9215_init(uint32_t base, qemu_irq irq)
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{
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DeviceState *dev;
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SysBusDevice *s;
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/* This should be a 9215 but the 9118 is close enough */
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if (nd_table[0].used) {
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qemu_check_nic_model(&nd_table[0], "lan9118");
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dev = qdev_new(TYPE_LAN9118);
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qdev_set_nic_properties(dev, &nd_table[0]);
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qdev_prop_set_uint32(dev, "mode_16bit", 1);
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s = SYS_BUS_DEVICE(dev);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, base);
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sysbus_connect_irq(s, 0, irq);
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}
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}
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static void exynos4_boards_init_ram(Exynos4BoardState *s,
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MemoryRegion *system_mem,
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unsigned long ram_size)
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{
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unsigned long mem_size = ram_size;
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if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
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memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
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mem_size - EXYNOS4210_DRAM_MAX_SIZE,
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&error_fatal);
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memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
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&s->dram1_mem);
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mem_size = EXYNOS4210_DRAM_MAX_SIZE;
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}
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memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
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&error_fatal);
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memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
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&s->dram0_mem);
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}
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static Exynos4BoardState *
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exynos4_boards_init_common(MachineState *machine,
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Exynos4BoardType board_type)
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{
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Exynos4BoardState *s = g_new(Exynos4BoardState, 1);
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exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
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exynos4_board_binfo.board_id = exynos4_board_id[board_type];
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exynos4_board_binfo.smp_bootreg_addr =
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exynos4_board_smp_bootreg_addr[board_type];
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exynos4_board_binfo.gic_cpu_if_addr =
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EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
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exynos4_boards_init_ram(s, get_system_memory(),
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exynos4_board_ram_size[board_type]);
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object_initialize_child(OBJECT(machine), "soc", &s->soc,
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TYPE_EXYNOS4210_SOC);
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sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
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return s;
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}
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static void nuri_init(MachineState *machine)
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{
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exynos4_boards_init_common(machine, EXYNOS4_BOARD_NURI);
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arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo);
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}
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static void smdkc210_init(MachineState *machine)
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{
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Exynos4BoardState *s = exynos4_boards_init_common(machine,
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EXYNOS4_BOARD_SMDKC210);
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lan9215_init(SMDK_LAN9118_BASE_ADDR,
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qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
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arm_load_kernel(ARM_CPU(first_cpu), machine, &exynos4_board_binfo);
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}
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static void nuri_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "Samsung NURI board (Exynos4210)";
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mc->init = nuri_init;
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mc->max_cpus = EXYNOS4210_NCPUS;
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mc->min_cpus = EXYNOS4210_NCPUS;
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mc->default_cpus = EXYNOS4210_NCPUS;
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mc->ignore_memory_transaction_failures = true;
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}
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static const TypeInfo nuri_type = {
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.name = MACHINE_TYPE_NAME("nuri"),
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.parent = TYPE_MACHINE,
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.class_init = nuri_class_init,
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};
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static void smdkc210_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "Samsung SMDKC210 board (Exynos4210)";
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mc->init = smdkc210_init;
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mc->max_cpus = EXYNOS4210_NCPUS;
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mc->min_cpus = EXYNOS4210_NCPUS;
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mc->default_cpus = EXYNOS4210_NCPUS;
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mc->ignore_memory_transaction_failures = true;
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}
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static const TypeInfo smdkc210_type = {
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.name = MACHINE_TYPE_NAME("smdkc210"),
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.parent = TYPE_MACHINE,
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.class_init = smdkc210_class_init,
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};
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static void exynos4_machines_init(void)
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{
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type_register_static(&nuri_type);
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type_register_static(&smdkc210_type);
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}
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type_init(exynos4_machines_init)
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