213 lines
7.8 KiB
C
213 lines
7.8 KiB
C
/*
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* arm cpu init and loop
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*
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* Copyright (c) 2013 Stacey D. Son
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_ARCH_CPU_H
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#define TARGET_ARCH_CPU_H
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#include "target_arch.h"
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#include "signal-common.h"
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#define TARGET_DEFAULT_CPU_MODEL "any"
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static inline void target_cpu_init(CPUARMState *env,
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struct target_pt_regs *regs)
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{
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int i;
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cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
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CPSRWriteByInstr);
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for (i = 0; i < 16; i++) {
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env->regs[i] = regs->uregs[i];
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}
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}
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static inline void target_cpu_loop(CPUARMState *env)
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{
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int trapnr, si_signo, si_code;
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CPUState *cs = env_cpu(env);
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for (;;) {
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cpu_exec_start(cs);
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trapnr = cpu_exec(cs);
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cpu_exec_end(cs);
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process_queued_cpu_work(cs);
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switch (trapnr) {
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case EXCP_UDEF:
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case EXCP_NOCP:
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case EXCP_INVSTATE:
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/*
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* See arm/arm/undefined.c undefinedinstruction();
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*
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* A number of details aren't emulated (they likely don't matter):
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* o Misaligned PC generates ILL_ILLADR (these can't come from qemu)
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* o Thumb-2 instructions generate ILLADR
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* o Both modes implement coprocessor instructions, which we don't
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* do here. FreeBSD just implements them for the VFP coprocessor
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* and special kernel breakpoints, trace points, dtrace, etc.
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*/
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force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->regs[15]);
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break;
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case EXCP_SWI:
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{
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int ret;
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abi_ulong params = get_sp_from_cpustate(env);
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int32_t syscall_nr = env->regs[7];
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int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
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/* See arm/arm/syscall.c cpu_fetch_syscall_args() */
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if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
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syscall_nr = env->regs[0];
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arg1 = env->regs[1];
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arg2 = env->regs[2];
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arg3 = env->regs[3];
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get_user_s32(arg4, params);
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params += sizeof(int32_t);
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get_user_s32(arg5, params);
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params += sizeof(int32_t);
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get_user_s32(arg6, params);
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params += sizeof(int32_t);
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get_user_s32(arg7, params);
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arg8 = 0;
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} else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
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syscall_nr = env->regs[0];
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arg1 = env->regs[2];
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arg2 = env->regs[3];
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get_user_s32(arg3, params);
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params += sizeof(int32_t);
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get_user_s32(arg4, params);
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params += sizeof(int32_t);
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get_user_s32(arg5, params);
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params += sizeof(int32_t);
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get_user_s32(arg6, params);
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arg7 = 0;
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arg8 = 0;
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} else {
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arg1 = env->regs[0];
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arg2 = env->regs[1];
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arg3 = env->regs[2];
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arg4 = env->regs[3];
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get_user_s32(arg5, params);
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params += sizeof(int32_t);
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get_user_s32(arg6, params);
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params += sizeof(int32_t);
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get_user_s32(arg7, params);
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params += sizeof(int32_t);
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get_user_s32(arg8, params);
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}
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ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3,
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arg4, arg5, arg6, arg7, arg8);
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/*
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* Compare to arm/arm/vm_machdep.c
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* cpu_set_syscall_retval()
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*/
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if (-TARGET_EJUSTRETURN == ret) {
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/*
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* Returning from a successful sigreturn syscall.
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* Avoid clobbering register state.
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*/
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break;
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}
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if (-TARGET_ERESTART == ret) {
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env->regs[15] -= env->thumb ? 2 : 4;
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break;
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}
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if ((unsigned int)ret >= (unsigned int)(-515)) {
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ret = -ret;
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cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr);
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env->regs[0] = ret;
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} else {
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cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr);
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env->regs[0] = ret; /* XXX need to handle lseek()? */
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/* env->regs[1] = 0; */
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}
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}
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break;
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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case EXCP_PREFETCH_ABORT:
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case EXCP_DATA_ABORT:
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/*
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* See arm/arm/trap-v6.c prefetch_abort_handler() and
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* data_abort_handler()
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*
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* However, FreeBSD maps these to a generic value and then uses that
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* to maybe fault in pages in vm/vm_fault.c:vm_fault_trap(). I
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* believe that the indirection maps the same as Linux, but haven't
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* chased down every single possible indirection.
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*/
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/* For user-only we don't set TTBCR_EAE, so look at the FSR. */
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switch (env->exception.fsr & 0x1f) {
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case 0x1: /* Alignment */
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si_signo = TARGET_SIGBUS;
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si_code = TARGET_BUS_ADRALN;
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break;
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case 0x3: /* Access flag fault, level 1 */
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case 0x6: /* Access flag fault, level 2 */
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case 0x9: /* Domain fault, level 1 */
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case 0xb: /* Domain fault, level 2 */
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case 0xd: /* Permission fault, level 1 */
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case 0xf: /* Permission fault, level 2 */
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si_signo = TARGET_SIGSEGV;
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si_code = TARGET_SEGV_ACCERR;
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break;
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case 0x5: /* Translation fault, level 1 */
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case 0x7: /* Translation fault, level 2 */
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si_signo = TARGET_SIGSEGV;
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si_code = TARGET_SEGV_MAPERR;
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break;
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default:
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g_assert_not_reached();
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}
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force_sig_fault(si_signo, si_code, env->exception.vaddress);
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break;
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case EXCP_DEBUG:
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case EXCP_BKPT:
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force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->regs[15]);
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break;
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case EXCP_YIELD:
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/* nothing to do here for user-mode, just resume guest code */
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break;
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case EXCP_ATOMIC:
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cpu_exec_step_atomic(cs);
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break;
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default:
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fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
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trapnr);
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cpu_dump_state(cs, stderr, 0);
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abort();
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} /* switch() */
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process_pending_signals(env);
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} /* for (;;) */
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}
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static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp)
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{
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if (newsp) {
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env->regs[13] = newsp;
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}
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env->regs[0] = 0;
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}
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static inline void target_cpu_reset(CPUArchState *env)
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{
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}
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#endif /* TARGET_ARCH_CPU_H */
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