branchement

This commit is contained in:
higepi 2023-03-09 18:34:12 +01:00
parent ed2dabd74e
commit d9da97d330
12 changed files with 26656 additions and 8 deletions

Binary file not shown.

After

Width:  |  Height:  |  Size: 41 KiB

View file

@ -0,0 +1,43 @@
import matplotlib.pyplot as plt
from sklearn.linear_model import LinearRegression
import numpy as np
Y_B2 = [36, 3876, 7716, 11556, 15396, 19236, 23076, 26916, 30756]
Y_B3 = [97, 36786, 84655, 135454, 191580, 247876, 304307, 365937, 427737]
YA_B2 = [28, 2124, 4199, 6345, 8380, 10441, 12525, 14607, 16690]
YA_B3 = [36, 4106 , 8161 , 12071, 16060, 20056 , 24096, 28115, 32068]
X = [0, 128, 256, 384, 512, 640, 768, 896, 1024]
plt.scatter(X, Y_B2, color="b", label="RISCV Branchement 1/2")
plt.scatter(X, Y_B3, color="b", marker="x", label="Branchement 1/3")
plt.scatter(X, YA_B2, color="r", label="ARM Branchement 1/2")
plt.scatter(X, YA_B3, color="r",marker="x", label="ARM Branchement 1/3")
x = np.array(X).reshape(-1, 1)
y = np.array(Y_B2).reshape(-1, 1)
y2 = np.array(YA_B2).reshape(-1, 1)
reg = LinearRegression().fit(x, y)
reg2 = LinearRegression().fit(x, y2)
print("score obtenu : " + str(reg.score(x, y)))
print("score obtenu : " + str(reg2.score(x, y2)))
print("attente à zéro : {}".format(reg.intercept_))
print("attente à zéro : {}".format(reg2.intercept_))
x_lin = [0, max(X)]
y_lin = [reg.predict(np.array([0]).reshape(-1, 1)), reg.predict(np.array([x_lin[1]]).reshape(-1, 1))]
y_lin2 = [reg2.predict(np.array([0]).reshape(-1, 1)), reg2.predict(np.array([x_lin[1]]).reshape(-1, 1))]
y_lin = [y_lin[0][0][0], y_lin[1][0][0]]
y_lin2 = [y_lin2[0][0][0], y_lin2[1][0][0]]
plt.plot(x_lin, y_lin, color = "b", label="RegLin score : {:.4f}".format(reg.score(x, y)))
plt.plot(x_lin, y_lin2, color = "r", label="RegLin score : {:.4f}".format(reg2.score(x, y2)))
plt.xlim([0, 1024])
plt.ylim([50, 450000])
plt.legend()
plt.title("Cycles d'exécution en fonction de n_max")
plt.ylabel("Cycles")
plt.xlabel("N_max")
plt.savefig("memory_cycles.png")
plt.show()

26485
branchement/debug.txt Normal file

File diff suppressed because it is too large Load diff

BIN
branchement/main.bin Normal file

Binary file not shown.

119
branchement/main.c Normal file
View file

@ -0,0 +1,119 @@
// #################################################################################################
// # << NEORV32 - "Hello World" Demo Program >> #
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
// # #
// # 1. Redistributions of source code must retain the above copyright notice, this list of #
// # conditions and the following disclaimer. #
// # #
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
// # conditions and the following disclaimer in the documentation and/or other materials #
// # provided with the distribution. #
// # #
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
// # endorse or promote products derived from this software without specific prior written #
// # permission. #
// # #
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
// # OF THE POSSIBILITY OF SUCH DAMAGE. #
// # ********************************************************************************************* #
// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
// #################################################################################################
/**********************************************************************//**
* @file hello_world/main.c
* @author Stephan Nolting
* @brief Classic 'hello world' demo program.
**************************************************************************/
#include <neorv32.h>
/**********************************************************************//**
* @name User configuration
**************************************************************************/
/**@{*/
/** UART BAUD rate */
#define BAUD_RATE 19200
/**@}*/
void fn_b2(uint32_t N, uint32_t *y){
for(uint32_t i=0; i<N; i++){
if(i%2) y[i] = 0;
else y[i] = 1;
}
}
void fn_b3(uint32_t N, uint32_t *x, uint32_t *y){
for(uint32_t i=0; i<N; i++){
if(i%3) y[i] = 0;
else y[i] = 1;
}
}
/**********************************************************************//**
* Main function; prints some fancy stuff via UART.
*
* @note This program requires the UART interface to be synthesized.
*
* @return 0 if execution was successful
**************************************************************************/
int main() {
long Begin_Time, End_Time, User_Time;
uint32_t n_max;
// capture all exceptions and give debug info via UART
// this is not required, but keeps us safe
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// say hello
neorv32_uart0_puts("Memory management cycles measure :\n");
neorv32_uart0_printf("NEORV32: Freq = %u\n",NEORV32_SYSINFO.CLK);
uint32_t y[1024];
uint32_t x;
for(n_max=0; n_max<1024+1; n_max+=128){
Begin_Time = (long)neorv32_mtime_get_time();
for(uint32_t j=0; j<10; j++){
fn_b2(n_max, y);
}
End_Time = (long)neorv32_mtime_get_time();
User_Time = End_Time - Begin_Time;
neorv32_uart0_printf("NEORV32: B2 mean cycles N = %u : %u\n",n_max, (uint32_t)User_Time/10);
Begin_Time = (long)neorv32_mtime_get_time();
for(uint32_t j=0; j<10; j++){
fn_b3(n_max, &x, y);
}
End_Time = (long)neorv32_mtime_get_time();
User_Time = End_Time - Begin_Time;
neorv32_uart0_printf("NEORV32: B3 mean cycles N = %u : %u\n",n_max, (uint32_t)User_Time/10);
}
neorv32_uart0_puts("end:\n");
return 0;
}

BIN
branchement/main.c.o Normal file

Binary file not shown.

BIN
branchement/main.elf Executable file

Binary file not shown.

4
branchement/makefile Normal file
View file

@ -0,0 +1,4 @@
# Modify this variable to fit your NEORV32 setup (neorv32 home folder)
NEORV32_HOME ?= ../neorv32
include $(NEORV32_HOME)/sw/common/common.mk

BIN
branchement/neorv32_exe.bin Normal file

Binary file not shown.

View file

@ -1,3 +1,3 @@
Quartus_Version = Version 22.1std.0 Build 915 10/25/2022 SC Standard Edition Quartus_Version = Version 22.1std.0 Build 915 10/25/2022 SC Standard Edition
Version_Index = 553882368 Version_Index = 553882368
Creation_Time = Thu Mar 9 16:31:59 2023 Creation_Time = Thu Mar 9 18:25:24 2023

View file

@ -1,7 +1,4 @@
start_full_compilation:s:00:02:10 start_full_compilation:s
start_analysis_synthesis:s:00:00:19-start_full_compilation start_assembler:s-start_full_compilation
start_analysis_elaboration:s-start_full_compilation start_timing_analyzer:s-start_full_compilation
start_fitter:s:00:01:31-start_full_compilation start_eda_netlist_writer:s-start_full_compilation
start_assembler:s:00:00:08-start_full_compilation
start_timing_analyzer:s:00:00:10-start_full_compilation
start_eda_netlist_writer:s:00:00:02-start_full_compilation