269 lines
11 KiB
C
269 lines
11 KiB
C
|
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
|
||
|
|
/* CPU data header for bpf.
|
||
|
|
|
||
|
|
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||
|
|
|
||
|
|
Copyright (C) 1996-2022 Free Software Foundation, Inc.
|
||
|
|
|
||
|
|
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
|
||
|
|
|
||
|
|
This file is free software; you can redistribute it and/or modify
|
||
|
|
it under the terms of the GNU General Public License as published by
|
||
|
|
the Free Software Foundation; either version 3, or (at your option)
|
||
|
|
any later version.
|
||
|
|
|
||
|
|
It is distributed in the hope that it will be useful, but WITHOUT
|
||
|
|
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||
|
|
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
||
|
|
License for more details.
|
||
|
|
|
||
|
|
You should have received a copy of the GNU General Public License along
|
||
|
|
with this program; if not, write to the Free Software Foundation, Inc.,
|
||
|
|
51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
|
||
|
|
|
||
|
|
*/
|
||
|
|
|
||
|
|
#ifndef BPF_CPU_H
|
||
|
|
#define BPF_CPU_H
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
extern "C" {
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#define CGEN_ARCH bpf
|
||
|
|
|
||
|
|
/* Given symbol S, return bpf_cgen_<S>. */
|
||
|
|
#define CGEN_SYM(s) bpf##_cgen_##s
|
||
|
|
|
||
|
|
|
||
|
|
/* Selected cpu families. */
|
||
|
|
#define HAVE_CPU_BPFBF
|
||
|
|
|
||
|
|
#define CGEN_INSN_LSB0_P 1
|
||
|
|
|
||
|
|
/* Minimum size of any insn (in bytes). */
|
||
|
|
#define CGEN_MIN_INSN_SIZE 8
|
||
|
|
|
||
|
|
/* Maximum size of any insn (in bytes). */
|
||
|
|
#define CGEN_MAX_INSN_SIZE 16
|
||
|
|
|
||
|
|
#define CGEN_INT_INSN_P 0
|
||
|
|
|
||
|
|
/* Maximum number of syntax elements in an instruction. */
|
||
|
|
#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 16
|
||
|
|
|
||
|
|
/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
|
||
|
|
e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
|
||
|
|
we can't hash on everything up to the space. */
|
||
|
|
#define CGEN_MNEMONIC_OPERANDS
|
||
|
|
|
||
|
|
/* Maximum number of fields in an instruction. */
|
||
|
|
#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 7
|
||
|
|
|
||
|
|
/* Enums. */
|
||
|
|
|
||
|
|
/* Enum declaration for eBPF instruction codes. */
|
||
|
|
typedef enum insn_op_code_alu {
|
||
|
|
OP_CODE_ADD = 0, OP_CODE_SUB = 1, OP_CODE_MUL = 2, OP_CODE_DIV = 3
|
||
|
|
, OP_CODE_OR = 4, OP_CODE_AND = 5, OP_CODE_LSH = 6, OP_CODE_RSH = 7
|
||
|
|
, OP_CODE_NEG = 8, OP_CODE_MOD = 9, OP_CODE_XOR = 10, OP_CODE_MOV = 11
|
||
|
|
, OP_CODE_ARSH = 12, OP_CODE_END = 13, OP_CODE_SDIV = 14, OP_CODE_SMOD = 15
|
||
|
|
, OP_CODE_JA = 0, OP_CODE_JEQ = 1, OP_CODE_JGT = 2, OP_CODE_JGE = 3
|
||
|
|
, OP_CODE_JSET = 4, OP_CODE_JNE = 5, OP_CODE_JSGT = 6, OP_CODE_JSGE = 7
|
||
|
|
, OP_CODE_CALL = 8, OP_CODE_EXIT = 9, OP_CODE_JLT = 10, OP_CODE_JLE = 11
|
||
|
|
, OP_CODE_JSLT = 12, OP_CODE_JSLE = 13
|
||
|
|
} INSN_OP_CODE_ALU;
|
||
|
|
|
||
|
|
/* Enum declaration for eBPF instruction source. */
|
||
|
|
typedef enum insn_op_src {
|
||
|
|
OP_SRC_K, OP_SRC_X
|
||
|
|
} INSN_OP_SRC;
|
||
|
|
|
||
|
|
/* Enum declaration for eBPF instruction class. */
|
||
|
|
typedef enum insn_op_class {
|
||
|
|
OP_CLASS_LD, OP_CLASS_LDX, OP_CLASS_ST, OP_CLASS_STX
|
||
|
|
, OP_CLASS_ALU, OP_CLASS_JMP, OP_CLASS_JMP32, OP_CLASS_ALU64
|
||
|
|
} INSN_OP_CLASS;
|
||
|
|
|
||
|
|
/* Enum declaration for eBPF load/store instruction modes. */
|
||
|
|
typedef enum insn_op_mode {
|
||
|
|
OP_MODE_IMM = 0, OP_MODE_ABS = 1, OP_MODE_IND = 2, OP_MODE_MEM = 3
|
||
|
|
, OP_MODE_XADD = 6
|
||
|
|
} INSN_OP_MODE;
|
||
|
|
|
||
|
|
/* Enum declaration for eBPF load/store instruction sizes. */
|
||
|
|
typedef enum insn_op_size {
|
||
|
|
OP_SIZE_W, OP_SIZE_H, OP_SIZE_B, OP_SIZE_DW
|
||
|
|
} INSN_OP_SIZE;
|
||
|
|
|
||
|
|
/* Attributes. */
|
||
|
|
|
||
|
|
/* Enum declaration for machine type selection. */
|
||
|
|
typedef enum mach_attr {
|
||
|
|
MACH_BASE, MACH_BPF, MACH_XBPF, MACH_MAX
|
||
|
|
} MACH_ATTR;
|
||
|
|
|
||
|
|
/* Enum declaration for instruction set selection. */
|
||
|
|
typedef enum isa_attr {
|
||
|
|
ISA_EBPFLE, ISA_EBPFBE, ISA_XBPFLE, ISA_XBPFBE
|
||
|
|
, ISA_MAX
|
||
|
|
} ISA_ATTR;
|
||
|
|
|
||
|
|
/* Number of architecture variants. */
|
||
|
|
#define MAX_ISAS ((int) ISA_MAX)
|
||
|
|
#define MAX_MACHS ((int) MACH_MAX)
|
||
|
|
|
||
|
|
/* Ifield support. */
|
||
|
|
|
||
|
|
/* Ifield attribute indices. */
|
||
|
|
|
||
|
|
/* Enum declaration for cgen_ifld attrs. */
|
||
|
|
typedef enum cgen_ifld_attr {
|
||
|
|
CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
|
||
|
|
, CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
|
||
|
|
, CGEN_IFLD_MACH, CGEN_IFLD_ISA, CGEN_IFLD_END_NBOOLS
|
||
|
|
} CGEN_IFLD_ATTR;
|
||
|
|
|
||
|
|
/* Number of non-boolean elements in cgen_ifld_attr. */
|
||
|
|
#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
|
||
|
|
|
||
|
|
/* cgen_ifld attribute accessor macros. */
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_ISA-CGEN_IFLD_START_NBOOLS-1].bitset)
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_VIRTUAL)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_RESERVED)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGNED)) != 0)
|
||
|
|
|
||
|
|
/* Enum declaration for bpf ifield types. */
|
||
|
|
typedef enum ifield_type {
|
||
|
|
BPF_F_NIL, BPF_F_ANYOF, BPF_F_OP_CODE, BPF_F_OP_SRC
|
||
|
|
, BPF_F_OP_CLASS, BPF_F_OP_MODE, BPF_F_OP_SIZE, BPF_F_DSTLE
|
||
|
|
, BPF_F_SRCLE, BPF_F_DSTBE, BPF_F_SRCBE, BPF_F_REGS
|
||
|
|
, BPF_F_OFFSET16, BPF_F_IMM32, BPF_F_IMM64_A, BPF_F_IMM64_B
|
||
|
|
, BPF_F_IMM64_C, BPF_F_IMM64, BPF_F_MAX
|
||
|
|
} IFIELD_TYPE;
|
||
|
|
|
||
|
|
#define MAX_IFLD ((int) BPF_F_MAX)
|
||
|
|
|
||
|
|
/* Hardware attribute indices. */
|
||
|
|
|
||
|
|
/* Enum declaration for cgen_hw attrs. */
|
||
|
|
typedef enum cgen_hw_attr {
|
||
|
|
CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
|
||
|
|
, CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_ISA
|
||
|
|
, CGEN_HW_END_NBOOLS
|
||
|
|
} CGEN_HW_ATTR;
|
||
|
|
|
||
|
|
/* Number of non-boolean elements in cgen_hw_attr. */
|
||
|
|
#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
|
||
|
|
|
||
|
|
/* cgen_hw attribute accessor macros. */
|
||
|
|
#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
|
||
|
|
#define CGEN_ATTR_CGEN_HW_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_ISA-CGEN_HW_START_NBOOLS-1].bitset)
|
||
|
|
#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_VIRTUAL)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_CACHE_ADDR)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PC)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PROFILE)) != 0)
|
||
|
|
|
||
|
|
/* Enum declaration for bpf hardware types. */
|
||
|
|
typedef enum cgen_hw_type {
|
||
|
|
HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
|
||
|
|
, HW_H_IADDR, HW_H_GPR, HW_H_PC, HW_H_SINT64
|
||
|
|
, HW_MAX
|
||
|
|
} CGEN_HW_TYPE;
|
||
|
|
|
||
|
|
#define MAX_HW ((int) HW_MAX)
|
||
|
|
|
||
|
|
/* Operand attribute indices. */
|
||
|
|
|
||
|
|
/* Enum declaration for cgen_operand attrs. */
|
||
|
|
typedef enum cgen_operand_attr {
|
||
|
|
CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
|
||
|
|
, CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
|
||
|
|
, CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_ISA
|
||
|
|
, CGEN_OPERAND_END_NBOOLS
|
||
|
|
} CGEN_OPERAND_ATTR;
|
||
|
|
|
||
|
|
/* Number of non-boolean elements in cgen_operand_attr. */
|
||
|
|
#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
|
||
|
|
|
||
|
|
/* cgen_operand attribute accessor macros. */
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_ISA-CGEN_OPERAND_START_NBOOLS-1].bitset)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGNED)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_RELAX)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
|
||
|
|
|
||
|
|
/* Enum declaration for bpf operand types. */
|
||
|
|
typedef enum cgen_operand_type {
|
||
|
|
BPF_OPERAND_PC, BPF_OPERAND_DSTLE, BPF_OPERAND_SRCLE, BPF_OPERAND_DSTBE
|
||
|
|
, BPF_OPERAND_SRCBE, BPF_OPERAND_DISP16, BPF_OPERAND_DISP32, BPF_OPERAND_IMM32
|
||
|
|
, BPF_OPERAND_OFFSET16, BPF_OPERAND_IMM64, BPF_OPERAND_ENDSIZE, BPF_OPERAND_MAX
|
||
|
|
} CGEN_OPERAND_TYPE;
|
||
|
|
|
||
|
|
/* Number of operands types. */
|
||
|
|
#define MAX_OPERANDS 11
|
||
|
|
|
||
|
|
/* Maximum number of operands referenced by any insn. */
|
||
|
|
#define MAX_OPERAND_INSTANCES 8
|
||
|
|
|
||
|
|
/* Insn attribute indices. */
|
||
|
|
|
||
|
|
/* Enum declaration for cgen_insn attrs. */
|
||
|
|
typedef enum cgen_insn_attr {
|
||
|
|
CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
|
||
|
|
, CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
|
||
|
|
, CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
|
||
|
|
, CGEN_INSN_MACH, CGEN_INSN_ISA, CGEN_INSN_END_NBOOLS
|
||
|
|
} CGEN_INSN_ATTR;
|
||
|
|
|
||
|
|
/* Number of non-boolean elements in cgen_insn_attr. */
|
||
|
|
#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
|
||
|
|
|
||
|
|
/* cgen_insn attribute accessor macros. */
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_ISA-CGEN_INSN_START_NBOOLS-1].bitset)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_ALIAS)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_VIRTUAL)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_COND_CTI)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_SKIP_CTI)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXABLE)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXED)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_NO_DIS)) != 0)
|
||
|
|
#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_PBB)) != 0)
|
||
|
|
|
||
|
|
/* cgen.h uses things we just defined. */
|
||
|
|
#include "opcode/cgen.h"
|
||
|
|
|
||
|
|
extern const struct cgen_ifld bpf_cgen_ifld_table[];
|
||
|
|
|
||
|
|
/* Attributes. */
|
||
|
|
extern const CGEN_ATTR_TABLE bpf_cgen_hardware_attr_table[];
|
||
|
|
extern const CGEN_ATTR_TABLE bpf_cgen_ifield_attr_table[];
|
||
|
|
extern const CGEN_ATTR_TABLE bpf_cgen_operand_attr_table[];
|
||
|
|
extern const CGEN_ATTR_TABLE bpf_cgen_insn_attr_table[];
|
||
|
|
|
||
|
|
/* Hardware decls. */
|
||
|
|
|
||
|
|
extern CGEN_KEYWORD bpf_cgen_opval_h_gpr;
|
||
|
|
|
||
|
|
extern const CGEN_HW_ENTRY bpf_cgen_hw_table[];
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* BPF_CPU_H */
|