2570 lines
75 KiB
C
2570 lines
75 KiB
C
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/* Simulator model support for iq2000bf.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2022 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#define WANT_CPU iq2000bf
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#define WANT_CPU_IQ2000BF
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#include "sim-main.h"
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/* The profiling data is recorded here, but is accessed via the profiling
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mechanism. After all, this is information for profiling. */
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#if WITH_PROFILE_MODEL_P
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/* Model handlers for each insn. */
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static int
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model_iq2000_add (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_addi (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addi.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_addiu (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addi.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_addu (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_ado16 (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_and (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_andi (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addi.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_andoi (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addi.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_nor (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_or (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_ori (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addi.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_ram (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_ram.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_sll (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_ram.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_sllv (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_slmv (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_ram.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_slt (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_slti (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addi.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_sltiu (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addi.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_iq2000_sltu (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_mrgb.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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|
int cycles = 0;
|
||
|
{
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|
int referenced = 0;
|
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|
int UNUSED insn_referenced = abuf->written;
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|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
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}
|
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|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
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|
model_iq2000_sra (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_ram.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srav (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_ram.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srlv (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srmv (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_ram.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_sub (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_subu (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_xor (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_xori (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bbi (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bbin (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bbv (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bbvn (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_beq (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_beql (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bgez (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bgezal (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bgezall (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bgezl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bltz (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bltzl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bltzal (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bltzall (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bmb0 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bmb1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bmb2 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bmb3 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bne (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bnel (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_jalr (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_jr (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lb (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lbu (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lh (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lhu (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lui (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lw (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_sb (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_sh (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_sw (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_break (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_syscall (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_andoui (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_orui (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bgtz (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bgtzl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_blez (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_blezl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mrgb (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_mrgb.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bctxt (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc0f (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc0fl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc3f (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc3fl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc0t (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc0tl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc3t (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bc3tl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_cfc0 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_cfc1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_cfc2 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_cfc3 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_chkhdr (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_ctc0 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_ctc1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_ctc2 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_ctc3 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_jcr (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_luc32 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_luc32l (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_luc64 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_luc64l (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_luk (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lulck (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lum32 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lum32l (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lum64 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lum64l (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lur (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_lurl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_luulck (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mfc0 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mfc1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mfc2 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mfc3 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mtc0 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mtc1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mtc2 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_mtc3 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_pkrl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_pkrlr1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_pkrlr30 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_rb (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_rbr1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_rbr30 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_rfe (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_rx (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_rxr1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_rxr30 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_sleep (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srrd (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srrdl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srulck (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srwr (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_srwru (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_trapqfl (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_trapqne (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_traprel (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wb (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wbu (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wbr1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wbr1u (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wbr30 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wbr30u (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wx (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wxu (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wxr1 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wxr1u (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wxr30 (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_wxr30u (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_ldw (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_sdw (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_addi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_j (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_j.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_jal (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_j.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
model_iq2000_bmb (SIM_CPU *current_cpu, void *sem_arg)
|
||
|
{
|
||
|
#define FLD(f) abuf->fields.sfmt_bbi.f
|
||
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
||
|
const IDESC * UNUSED idesc = abuf->idesc;
|
||
|
int cycles = 0;
|
||
|
{
|
||
|
int referenced = 0;
|
||
|
int UNUSED insn_referenced = abuf->written;
|
||
|
cycles += iq2000bf_model_iq2000_u_exec (current_cpu, idesc, 0, referenced);
|
||
|
}
|
||
|
return cycles;
|
||
|
#undef FLD
|
||
|
}
|
||
|
|
||
|
/* We assume UNIT_NONE == 0 because the tables don't always terminate
|
||
|
entries with it. */
|
||
|
|
||
|
/* Model timing data for `iq2000'. */
|
||
|
|
||
|
static const INSN_TIMING iq2000_timing[] = {
|
||
|
{ IQ2000BF_INSN_X_INVALID, 0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_X_AFTER, 0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_X_BEFORE, 0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_X_CHAIN, 0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_X_BEGIN, 0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ADD, model_iq2000_add, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ADDI, model_iq2000_addi, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ADDIU, model_iq2000_addiu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ADDU, model_iq2000_addu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ADO16, model_iq2000_ado16, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_AND, model_iq2000_and, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ANDI, model_iq2000_andi, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ANDOI, model_iq2000_andoi, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_NOR, model_iq2000_nor, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_OR, model_iq2000_or, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ORI, model_iq2000_ori, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RAM, model_iq2000_ram, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLL, model_iq2000_sll, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLLV, model_iq2000_sllv, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLMV, model_iq2000_slmv, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLT, model_iq2000_slt, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLTI, model_iq2000_slti, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLTIU, model_iq2000_sltiu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLTU, model_iq2000_sltu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRA, model_iq2000_sra, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRAV, model_iq2000_srav, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRL, model_iq2000_srl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRLV, model_iq2000_srlv, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRMV, model_iq2000_srmv, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SUB, model_iq2000_sub, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SUBU, model_iq2000_subu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_XOR, model_iq2000_xor, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_XORI, model_iq2000_xori, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BBI, model_iq2000_bbi, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BBIN, model_iq2000_bbin, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BBV, model_iq2000_bbv, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BBVN, model_iq2000_bbvn, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BEQ, model_iq2000_beq, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BEQL, model_iq2000_beql, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BGEZ, model_iq2000_bgez, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BGEZAL, model_iq2000_bgezal, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BGEZALL, model_iq2000_bgezall, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BGEZL, model_iq2000_bgezl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BLTZ, model_iq2000_bltz, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BLTZL, model_iq2000_bltzl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BLTZAL, model_iq2000_bltzal, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BLTZALL, model_iq2000_bltzall, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BMB0, model_iq2000_bmb0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BMB1, model_iq2000_bmb1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BMB2, model_iq2000_bmb2, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BMB3, model_iq2000_bmb3, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BNE, model_iq2000_bne, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BNEL, model_iq2000_bnel, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_JALR, model_iq2000_jalr, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_JR, model_iq2000_jr, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LB, model_iq2000_lb, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LBU, model_iq2000_lbu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LH, model_iq2000_lh, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LHU, model_iq2000_lhu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUI, model_iq2000_lui, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LW, model_iq2000_lw, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SB, model_iq2000_sb, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SH, model_iq2000_sh, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SW, model_iq2000_sw, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BREAK, model_iq2000_break, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SYSCALL, model_iq2000_syscall, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ANDOUI, model_iq2000_andoui, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_ORUI, model_iq2000_orui, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BGTZ, model_iq2000_bgtz, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BGTZL, model_iq2000_bgtzl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BLEZ, model_iq2000_blez, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BLEZL, model_iq2000_blezl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MRGB, model_iq2000_mrgb, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BCTXT, model_iq2000_bctxt, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC0F, model_iq2000_bc0f, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC0FL, model_iq2000_bc0fl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC3F, model_iq2000_bc3f, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC3FL, model_iq2000_bc3fl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC0T, model_iq2000_bc0t, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC0TL, model_iq2000_bc0tl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC3T, model_iq2000_bc3t, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BC3TL, model_iq2000_bc3tl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CFC0, model_iq2000_cfc0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CFC1, model_iq2000_cfc1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CFC2, model_iq2000_cfc2, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CFC3, model_iq2000_cfc3, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CHKHDR, model_iq2000_chkhdr, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CTC0, model_iq2000_ctc0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CTC1, model_iq2000_ctc1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CTC2, model_iq2000_ctc2, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_CTC3, model_iq2000_ctc3, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_JCR, model_iq2000_jcr, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUC32, model_iq2000_luc32, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUC32L, model_iq2000_luc32l, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUC64, model_iq2000_luc64, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUC64L, model_iq2000_luc64l, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUK, model_iq2000_luk, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LULCK, model_iq2000_lulck, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUM32, model_iq2000_lum32, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUM32L, model_iq2000_lum32l, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUM64, model_iq2000_lum64, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUM64L, model_iq2000_lum64l, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUR, model_iq2000_lur, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LURL, model_iq2000_lurl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LUULCK, model_iq2000_luulck, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MFC0, model_iq2000_mfc0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MFC1, model_iq2000_mfc1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MFC2, model_iq2000_mfc2, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MFC3, model_iq2000_mfc3, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MTC0, model_iq2000_mtc0, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MTC1, model_iq2000_mtc1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MTC2, model_iq2000_mtc2, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_MTC3, model_iq2000_mtc3, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_PKRL, model_iq2000_pkrl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_PKRLR1, model_iq2000_pkrlr1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_PKRLR30, model_iq2000_pkrlr30, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RB, model_iq2000_rb, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RBR1, model_iq2000_rbr1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RBR30, model_iq2000_rbr30, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RFE, model_iq2000_rfe, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RX, model_iq2000_rx, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RXR1, model_iq2000_rxr1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_RXR30, model_iq2000_rxr30, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SLEEP, model_iq2000_sleep, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRRD, model_iq2000_srrd, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRRDL, model_iq2000_srrdl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRULCK, model_iq2000_srulck, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRWR, model_iq2000_srwr, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SRWRU, model_iq2000_srwru, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_TRAPQFL, model_iq2000_trapqfl, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_TRAPQNE, model_iq2000_trapqne, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_TRAPREL, model_iq2000_traprel, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WB, model_iq2000_wb, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WBU, model_iq2000_wbu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WBR1, model_iq2000_wbr1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WBR1U, model_iq2000_wbr1u, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WBR30, model_iq2000_wbr30, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WBR30U, model_iq2000_wbr30u, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WX, model_iq2000_wx, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WXU, model_iq2000_wxu, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WXR1, model_iq2000_wxr1, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WXR1U, model_iq2000_wxr1u, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WXR30, model_iq2000_wxr30, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_WXR30U, model_iq2000_wxr30u, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_LDW, model_iq2000_ldw, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_SDW, model_iq2000_sdw, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_J, model_iq2000_j, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_JAL, model_iq2000_jal, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
{ IQ2000BF_INSN_BMB, model_iq2000_bmb, { { (int) UNIT_IQ2000_U_EXEC, 1, 1 } } },
|
||
|
};
|
||
|
|
||
|
#endif /* WITH_PROFILE_MODEL_P */
|
||
|
|
||
|
static void
|
||
|
iq2000_model_init (SIM_CPU *cpu)
|
||
|
{
|
||
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_IQ2000_DATA));
|
||
|
}
|
||
|
|
||
|
#if WITH_PROFILE_MODEL_P
|
||
|
#define TIMING_DATA(td) td
|
||
|
#else
|
||
|
#define TIMING_DATA(td) 0
|
||
|
#endif
|
||
|
|
||
|
static const SIM_MODEL iq2000_models[] =
|
||
|
{
|
||
|
{ "iq2000", & iq2000_mach, MODEL_IQ2000, TIMING_DATA (& iq2000_timing[0]), iq2000_model_init },
|
||
|
{ 0 }
|
||
|
};
|
||
|
|
||
|
/* The properties of this cpu's implementation. */
|
||
|
|
||
|
static const SIM_MACH_IMP_PROPERTIES iq2000bf_imp_properties =
|
||
|
{
|
||
|
sizeof (SIM_CPU),
|
||
|
#if WITH_SCACHE
|
||
|
sizeof (SCACHE)
|
||
|
#else
|
||
|
0
|
||
|
#endif
|
||
|
};
|
||
|
|
||
|
|
||
|
static void
|
||
|
iq2000bf_prepare_run (SIM_CPU *cpu)
|
||
|
{
|
||
|
if (CPU_IDESC (cpu) == NULL)
|
||
|
iq2000bf_init_idesc_table (cpu);
|
||
|
}
|
||
|
|
||
|
static const CGEN_INSN *
|
||
|
iq2000bf_get_idata (SIM_CPU *cpu, int inum)
|
||
|
{
|
||
|
return CPU_IDESC (cpu) [inum].idata;
|
||
|
}
|
||
|
|
||
|
static void
|
||
|
iq2000_init_cpu (SIM_CPU *cpu)
|
||
|
{
|
||
|
CPU_REG_FETCH (cpu) = iq2000bf_fetch_register;
|
||
|
CPU_REG_STORE (cpu) = iq2000bf_store_register;
|
||
|
CPU_PC_FETCH (cpu) = iq2000bf_h_pc_get;
|
||
|
CPU_PC_STORE (cpu) = iq2000bf_h_pc_set;
|
||
|
CPU_GET_IDATA (cpu) = iq2000bf_get_idata;
|
||
|
CPU_MAX_INSNS (cpu) = IQ2000BF_INSN__MAX;
|
||
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
||
|
CPU_FULL_ENGINE_FN (cpu) = iq2000bf_engine_run_full;
|
||
|
#if WITH_FAST
|
||
|
CPU_FAST_ENGINE_FN (cpu) = iq2000bf_engine_run_fast;
|
||
|
#else
|
||
|
CPU_FAST_ENGINE_FN (cpu) = iq2000bf_engine_run_full;
|
||
|
#endif
|
||
|
}
|
||
|
|
||
|
const SIM_MACH iq2000_mach =
|
||
|
{
|
||
|
"iq2000", "iq2000", MACH_IQ2000,
|
||
|
32, 32, & iq2000_models[0], & iq2000bf_imp_properties,
|
||
|
iq2000_init_cpu,
|
||
|
iq2000bf_prepare_run
|
||
|
};
|
||
|
|