419 lines
14 KiB
C++
419 lines
14 KiB
C++
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/* Target dependent code for the remote server for GNU/Linux ARC.
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Copyright 2020-2022 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "regdef.h"
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#include "linux-low.h"
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#include "tdesc.h"
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#include "arch/arc.h"
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#include <linux/elf.h>
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#include <arpa/inet.h>
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/* Linux starting with 4.12 supports NT_ARC_V2 note type, which adds R30,
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R58 and R59 registers. */
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#ifdef NT_ARC_V2
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#define ARC_HAS_V2_REGSET
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#endif
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/* The encoding of the instruction "TRAP_S 1" (endianness agnostic). */
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#define TRAP_S_1_OPCODE 0x783e
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#define TRAP_S_1_SIZE 2
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/* Using a mere "uint16_t arc_linux_traps_s = TRAP_S_1_OPCODE" would
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work as well, because the endianness will end up correctly when
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the code is compiled for the same endianness as the target (see
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the notes for "low_breakpoint_at" in this file). However, this
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illustrates how the __BIG_ENDIAN__ macro can be used to make
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easy-to-understand codes. */
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#if defined(__BIG_ENDIAN__)
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/* 0x78, 0x3e. */
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static gdb_byte arc_linux_trap_s[TRAP_S_1_SIZE]
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= {TRAP_S_1_OPCODE >> 8, TRAP_S_1_OPCODE & 0xFF};
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#else
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/* 0x3e, 0x78. */
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static gdb_byte arc_linux_trap_s[TRAP_S_1_SIZE]
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= {TRAP_S_1_OPCODE && 0xFF, TRAP_S_1_OPCODE >> 8};
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#endif
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/* Linux target op definitions for the ARC architecture.
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Note for future: in case of adding the protected method low_get_next_pcs(),
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the public method supports_software_single_step() should be added to return
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"true". */
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class arc_target : public linux_process_target
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{
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public:
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const regs_info *get_regs_info () override;
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const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
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protected:
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void low_arch_setup () override;
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bool low_cannot_fetch_register (int regno) override;
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bool low_cannot_store_register (int regno) override;
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bool low_supports_breakpoints () override;
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CORE_ADDR low_get_pc (regcache *regcache) override;
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void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
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bool low_breakpoint_at (CORE_ADDR where) override;
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};
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/* The singleton target ops object. */
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static arc_target the_arc_target;
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bool
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arc_target::low_supports_breakpoints ()
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{
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return true;
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}
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CORE_ADDR
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arc_target::low_get_pc (regcache *regcache)
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{
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return linux_get_pc_32bit (regcache);
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}
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void
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arc_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
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{
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linux_set_pc_32bit (regcache, pc);
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}
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static const struct target_desc *
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arc_linux_read_description (void)
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{
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#ifdef __ARC700__
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arc_arch_features features (4, ARC_ISA_ARCV1);
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#else
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arc_arch_features features (4, ARC_ISA_ARCV2);
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#endif
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target_desc_up tdesc = arc_create_target_description (features);
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static const char *expedite_regs[] = { "sp", "status32", nullptr };
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init_target_desc (tdesc.get (), expedite_regs);
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return tdesc.release ();
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}
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void
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arc_target::low_arch_setup ()
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{
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current_process ()->tdesc = arc_linux_read_description ();
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}
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bool
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arc_target::low_cannot_fetch_register (int regno)
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{
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return (regno >= current_process ()->tdesc->reg_defs.size ());
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}
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bool
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arc_target::low_cannot_store_register (int regno)
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{
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return (regno >= current_process ()->tdesc->reg_defs.size ());
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}
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/* This works for both endianness. Below you see an illustration of how
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the "trap_s 1" instruction encoded for both endianness in the memory
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will end up as the TRAP_S_1_OPCODE constant:
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BE: 0x78 0x3e --> at INSN addr: 0x78 0x3e --> INSN = 0x783e
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LE: 0x3e 0x78 --> at INSN addr: 0x3e 0x78 --> INSN = 0x783e
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One can employ "memcmp()" for comparing the arrays too. */
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bool
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arc_target::low_breakpoint_at (CORE_ADDR where)
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{
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uint16_t insn;
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/* "the_target" global variable is the current object at hand. */
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this->read_memory (where, (gdb_byte *) &insn, TRAP_S_1_SIZE);
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return (insn == TRAP_S_1_OPCODE);
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}
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/* PTRACE_GETREGSET/NT_PRSTATUS and PTRACE_SETREGSET/NT_PRSTATUS work with
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regsets in a struct, "user_regs_struct", defined in the
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linux/arch/arc/include/uapi/asm/ptrace.h header. This code supports
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ARC Linux ABI v3 and v4. */
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/* Populate a ptrace NT_PRSTATUS regset from a regcache.
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This appears to be a unique approach to populating the buffer, but
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being name, rather than offset based, it is robust to future API
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changes, as there is no need to create a regmap of registers in the
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user_regs_struct. */
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static void
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arc_fill_gregset (struct regcache *regcache, void *buf)
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{
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struct user_regs_struct *regbuf = (struct user_regs_struct *) buf;
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/* Core registers. */
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collect_register_by_name (regcache, "r0", &(regbuf->scratch.r0));
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collect_register_by_name (regcache, "r1", &(regbuf->scratch.r1));
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collect_register_by_name (regcache, "r2", &(regbuf->scratch.r2));
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collect_register_by_name (regcache, "r3", &(regbuf->scratch.r3));
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collect_register_by_name (regcache, "r4", &(regbuf->scratch.r4));
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collect_register_by_name (regcache, "r5", &(regbuf->scratch.r5));
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collect_register_by_name (regcache, "r6", &(regbuf->scratch.r6));
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collect_register_by_name (regcache, "r7", &(regbuf->scratch.r7));
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collect_register_by_name (regcache, "r8", &(regbuf->scratch.r8));
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collect_register_by_name (regcache, "r9", &(regbuf->scratch.r9));
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collect_register_by_name (regcache, "r10", &(regbuf->scratch.r10));
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collect_register_by_name (regcache, "r11", &(regbuf->scratch.r11));
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collect_register_by_name (regcache, "r12", &(regbuf->scratch.r12));
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collect_register_by_name (regcache, "r13", &(regbuf->callee.r13));
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collect_register_by_name (regcache, "r14", &(regbuf->callee.r14));
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collect_register_by_name (regcache, "r15", &(regbuf->callee.r15));
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collect_register_by_name (regcache, "r16", &(regbuf->callee.r16));
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collect_register_by_name (regcache, "r17", &(regbuf->callee.r17));
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collect_register_by_name (regcache, "r18", &(regbuf->callee.r18));
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collect_register_by_name (regcache, "r19", &(regbuf->callee.r19));
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collect_register_by_name (regcache, "r20", &(regbuf->callee.r20));
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collect_register_by_name (regcache, "r21", &(regbuf->callee.r21));
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collect_register_by_name (regcache, "r22", &(regbuf->callee.r22));
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collect_register_by_name (regcache, "r23", &(regbuf->callee.r23));
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collect_register_by_name (regcache, "r24", &(regbuf->callee.r24));
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collect_register_by_name (regcache, "r25", &(regbuf->callee.r25));
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collect_register_by_name (regcache, "gp", &(regbuf->scratch.gp));
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collect_register_by_name (regcache, "fp", &(regbuf->scratch.fp));
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collect_register_by_name (regcache, "sp", &(regbuf->scratch.sp));
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collect_register_by_name (regcache, "blink", &(regbuf->scratch.blink));
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/* Loop registers. */
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collect_register_by_name (regcache, "lp_count", &(regbuf->scratch.lp_count));
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collect_register_by_name (regcache, "lp_start", &(regbuf->scratch.lp_start));
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collect_register_by_name (regcache, "lp_end", &(regbuf->scratch.lp_end));
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/* The current "pc" value must be written to "eret" (exception return
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address) register, because that is the address that the kernel code
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will jump back to after a breakpoint exception has been raised.
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The "pc_stop" value is ignored by the genregs_set() in
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linux/arch/arc/kernel/ptrace.c. */
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collect_register_by_name (regcache, "pc", &(regbuf->scratch.ret));
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/* Currently ARC Linux ptrace doesn't allow writes to status32 because
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some of its bits are kernel mode-only and shoudn't be writable from
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user-space. Writing status32 from debugger could be useful, though,
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so ability to write non-priviliged bits will be added to kernel
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sooner or later. */
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/* BTA. */
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collect_register_by_name (regcache, "bta", &(regbuf->scratch.bta));
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}
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/* Populate a regcache from a ptrace NT_PRSTATUS regset. */
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static void
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arc_store_gregset (struct regcache *regcache, const void *buf)
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{
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const struct user_regs_struct *regbuf = (const struct user_regs_struct *) buf;
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/* Core registers. */
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supply_register_by_name (regcache, "r0", &(regbuf->scratch.r0));
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supply_register_by_name (regcache, "r1", &(regbuf->scratch.r1));
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supply_register_by_name (regcache, "r2", &(regbuf->scratch.r2));
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supply_register_by_name (regcache, "r3", &(regbuf->scratch.r3));
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supply_register_by_name (regcache, "r4", &(regbuf->scratch.r4));
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supply_register_by_name (regcache, "r5", &(regbuf->scratch.r5));
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supply_register_by_name (regcache, "r6", &(regbuf->scratch.r6));
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supply_register_by_name (regcache, "r7", &(regbuf->scratch.r7));
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supply_register_by_name (regcache, "r8", &(regbuf->scratch.r8));
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supply_register_by_name (regcache, "r9", &(regbuf->scratch.r9));
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supply_register_by_name (regcache, "r10", &(regbuf->scratch.r10));
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supply_register_by_name (regcache, "r11", &(regbuf->scratch.r11));
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supply_register_by_name (regcache, "r12", &(regbuf->scratch.r12));
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supply_register_by_name (regcache, "r13", &(regbuf->callee.r13));
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supply_register_by_name (regcache, "r14", &(regbuf->callee.r14));
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supply_register_by_name (regcache, "r15", &(regbuf->callee.r15));
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supply_register_by_name (regcache, "r16", &(regbuf->callee.r16));
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supply_register_by_name (regcache, "r17", &(regbuf->callee.r17));
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supply_register_by_name (regcache, "r18", &(regbuf->callee.r18));
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supply_register_by_name (regcache, "r19", &(regbuf->callee.r19));
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supply_register_by_name (regcache, "r20", &(regbuf->callee.r20));
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supply_register_by_name (regcache, "r21", &(regbuf->callee.r21));
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supply_register_by_name (regcache, "r22", &(regbuf->callee.r22));
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supply_register_by_name (regcache, "r23", &(regbuf->callee.r23));
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supply_register_by_name (regcache, "r24", &(regbuf->callee.r24));
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supply_register_by_name (regcache, "r25", &(regbuf->callee.r25));
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supply_register_by_name (regcache, "gp", &(regbuf->scratch.gp));
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supply_register_by_name (regcache, "fp", &(regbuf->scratch.fp));
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supply_register_by_name (regcache, "sp", &(regbuf->scratch.sp));
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supply_register_by_name (regcache, "blink", &(regbuf->scratch.blink));
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/* Loop registers. */
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supply_register_by_name (regcache, "lp_count", &(regbuf->scratch.lp_count));
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supply_register_by_name (regcache, "lp_start", &(regbuf->scratch.lp_start));
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supply_register_by_name (regcache, "lp_end", &(regbuf->scratch.lp_end));
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/* The genregs_get() in linux/arch/arc/kernel/ptrace.c populates the
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pseudo register "stop_pc" with the "efa" (exception fault address)
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register. This was deemed necessary, because the breakpoint
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instruction, "trap_s 1", is a committing one; i.e. the "eret"
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(exception return address) register will be pointing to the next
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instruction, while "efa" points to the address that raised the
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breakpoint. */
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supply_register_by_name (regcache, "pc", &(regbuf->stop_pc));
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unsigned long pcl = regbuf->stop_pc & ~3L;
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supply_register_by_name (regcache, "pcl", &pcl);
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/* Other auxilliary registers. */
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supply_register_by_name (regcache, "status32", &(regbuf->scratch.status32));
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/* BTA. */
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supply_register_by_name (regcache, "bta", &(regbuf->scratch.bta));
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}
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#ifdef ARC_HAS_V2_REGSET
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/* Look through a regcache's TDESC for a register named NAME.
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If found, return true; false, otherwise. */
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static bool
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is_reg_name_available_p (const struct target_desc *tdesc,
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const char *name)
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{
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for (const gdb::reg ® : tdesc->reg_defs)
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if (strcmp (name, reg.name) == 0)
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return true;
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return false;
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}
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/* Copy registers from regcache to user_regs_arcv2. */
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static void
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arc_fill_v2_regset (struct regcache *regcache, void *buf)
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{
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|
|
struct user_regs_arcv2 *regbuf = (struct user_regs_arcv2 *) buf;
|
||
|
|
|
||
|
|
if (is_reg_name_available_p (regcache->tdesc, "r30"))
|
||
|
|
collect_register_by_name (regcache, "r30", &(regbuf->r30));
|
||
|
|
|
||
|
|
if (is_reg_name_available_p (regcache->tdesc, "r58"))
|
||
|
|
collect_register_by_name (regcache, "r58", &(regbuf->r58));
|
||
|
|
|
||
|
|
if (is_reg_name_available_p (regcache->tdesc, "r59"))
|
||
|
|
collect_register_by_name (regcache, "r59", &(regbuf->r59));
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Copy registers from user_regs_arcv2 to regcache. */
|
||
|
|
|
||
|
|
static void
|
||
|
|
arc_store_v2_regset (struct regcache *regcache, const void *buf)
|
||
|
|
{
|
||
|
|
struct user_regs_arcv2 *regbuf = (struct user_regs_arcv2 *) buf;
|
||
|
|
|
||
|
|
if (is_reg_name_available_p (regcache->tdesc, "r30"))
|
||
|
|
supply_register_by_name (regcache, "r30", &(regbuf->r30));
|
||
|
|
|
||
|
|
if (is_reg_name_available_p (regcache->tdesc, "r58"))
|
||
|
|
supply_register_by_name (regcache, "r58", &(regbuf->r58));
|
||
|
|
|
||
|
|
if (is_reg_name_available_p (regcache->tdesc, "r59"))
|
||
|
|
supply_register_by_name (regcache, "r59", &(regbuf->r59));
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* Fetch the thread-local storage pointer for libthread_db. Note that
|
||
|
|
this function is not called from GDB, but is called from libthread_db.
|
||
|
|
|
||
|
|
This is the same function as for other architectures, for example in
|
||
|
|
linux-arm-low.c. */
|
||
|
|
|
||
|
|
ps_err_e
|
||
|
|
ps_get_thread_area (struct ps_prochandle *ph, lwpid_t lwpid,
|
||
|
|
int idx, void **base)
|
||
|
|
{
|
||
|
|
if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, nullptr, base) != 0)
|
||
|
|
return PS_ERR;
|
||
|
|
|
||
|
|
/* IDX is the bias from the thread pointer to the beginning of the
|
||
|
|
thread descriptor. It has to be subtracted due to implementation
|
||
|
|
quirks in libthread_db. */
|
||
|
|
*base = (void *) ((char *) *base - idx);
|
||
|
|
|
||
|
|
return PS_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct regset_info arc_regsets[] =
|
||
|
|
{
|
||
|
|
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
|
||
|
|
sizeof (struct user_regs_struct), GENERAL_REGS,
|
||
|
|
arc_fill_gregset, arc_store_gregset
|
||
|
|
},
|
||
|
|
#ifdef ARC_HAS_V2_REGSET
|
||
|
|
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARC_V2,
|
||
|
|
sizeof (struct user_regs_arcv2), GENERAL_REGS,
|
||
|
|
arc_fill_v2_regset, arc_store_v2_regset
|
||
|
|
},
|
||
|
|
#endif
|
||
|
|
NULL_REGSET
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct regsets_info arc_regsets_info =
|
||
|
|
{
|
||
|
|
arc_regsets, /* regsets */
|
||
|
|
0, /* num_regsets */
|
||
|
|
nullptr, /* disabled regsets */
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct regs_info arc_regs_info =
|
||
|
|
{
|
||
|
|
nullptr, /* regset_bitmap */
|
||
|
|
nullptr, /* usrregs */
|
||
|
|
&arc_regsets_info
|
||
|
|
};
|
||
|
|
|
||
|
|
const regs_info *
|
||
|
|
arc_target::get_regs_info ()
|
||
|
|
{
|
||
|
|
return &arc_regs_info;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* One of the methods necessary for Z0 packet support. */
|
||
|
|
|
||
|
|
const gdb_byte *
|
||
|
|
arc_target::sw_breakpoint_from_kind (int kind, int *size)
|
||
|
|
{
|
||
|
|
gdb_assert (kind == TRAP_S_1_SIZE);
|
||
|
|
*size = kind;
|
||
|
|
return arc_linux_trap_s;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* The linux target ops object. */
|
||
|
|
|
||
|
|
linux_process_target *the_linux_target = &the_arc_target;
|
||
|
|
|
||
|
|
void
|
||
|
|
initialize_low_arch (void)
|
||
|
|
{
|
||
|
|
initialize_regsets_info (&arc_regsets_info);
|
||
|
|
}
|