51 lines
3 KiB
Text
51 lines
3 KiB
Text
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<<<
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:sectnums:
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==== Instruction Memory (IMEM)
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[cols="<3,<3,<4"]
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[frame="topbot",grid="none"]
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|=======================
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| Hardware source file(s): | neorv32_imem.entity.vhd | entity-only definition
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| | mem/neorv32_imem.default.vhd | default _platform-agnostic_ memory architecture
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| Software driver file(s): | none | _implicitly used_
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| Top entity port: | none |
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| Configuration generics: | _MEM_INT_IMEM_EN_ | implement processor-internal IMEM when _true_
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| | _MEM_INT_IMEM_SIZE_ | IMEM size in bytes
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| | _INT_BOOTLOADER_EN_ | use internal bootloader when _true_ (implements IMEM as _uninitialized_ RAM, otherwise the IMEM is implemented an _pre-intialized_ ROM)
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| CPU interrupts: | none |
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|=======================
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Implementation of the processor-internal instruction memory is enabled via the processor's
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_MEM_INT_IMEM_EN_ generic. The size in bytes is defined via the _MEM_INT_IMEM_SIZE_ generic. If the
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IMEM is implemented, the memory is mapped into the instruction memory space and located right at the
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beginning of the instruction memory space (default `ispace_base_c` = 0x00000000).
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By default the IMEM is implemented as true RAM so the content can be modified during run time. This is
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required when using a bootloader that can update the content of the IMEM at any time. If you do not need
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the bootloader anymore - since your application development has completed and you want the program to
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permanently reside in the internal instruction memory - the IMEM is automatically implemented as _pre-intialized_
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ROM when the processor-internal bootloader is disabled (_INT_BOOTLOADER_EN_ = _false_).
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When the IMEM is implemented as ROM, it will be initialized during synthesis (actually, by the bitstream)
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with the actual application program image. The compiler toolchain will generate a VHDL initialization
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file `rtl/core/neorv32_application_image.vhd`, which is automatically inserted into the IMEM. If
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the IMEM is implemented as RAM (default), the memory will **not be initialized at all**.
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.Access Latency
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[NOTE]
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By default, the IMEM has a fixed access latency of one clock cycle (like all other processor-internal
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modules). However, custom versions of this module may also have higher access latency. See section <<_bus_interface>>
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for more information.
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.VHDL Source File
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[NOTE]
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The actual IMEM is split into two design files: a plain entity definition (`neorv32_imem.entity.vhd`) and the actual
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architecture definition (`mem/neorv32_imem.default.vhd`). This **default architecture** provides a _generic_ and
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_platform independent_ memory design that (should) infers embedded memory block. You can replace/modify the architecture
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source file in order to use platform-specific features (like advanced memory resources) or to improve technology mapping
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and/or timing.
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.Read-Only Access
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[NOTE]
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If the IMEM is implemented as true ROM any write attempt to it will raise a _store access fault_ exception.
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