419 lines
13 KiB
C
419 lines
13 KiB
C
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/*
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* SSI to SD card adapter.
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*
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* Copyright (c) 2007-2009 CodeSourcery.
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* Written by Paul Brook
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*
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* Copyright (c) 2021 Wind River Systems, Inc.
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* Improved by Bin Meng <bin.meng@windriver.com>
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*
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* Validated with U-Boot v2021.01 and Linux v5.10 mmc_spi driver
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*
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* This code is licensed under the GNU GPL v2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "sysemu/blockdev.h"
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#include "hw/ssi/ssi.h"
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#include "migration/vmstate.h"
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#include "hw/qdev-properties.h"
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#include "hw/sd/sd.h"
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#include "qapi/error.h"
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#include "qemu/crc-ccitt.h"
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#include "qemu/module.h"
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#include "qom/object.h"
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//#define DEBUG_SSI_SD 1
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#ifdef DEBUG_SSI_SD
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#define DPRINTF(fmt, ...) \
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do { printf("ssi_sd: " fmt , ## __VA_ARGS__); } while (0)
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "ssi_sd: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
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#else
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#define DPRINTF(fmt, ...) do {} while(0)
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "ssi_sd: error: " fmt , ## __VA_ARGS__);} while (0)
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#endif
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typedef enum {
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SSI_SD_CMD = 0,
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SSI_SD_CMDARG,
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SSI_SD_PREP_RESP,
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SSI_SD_RESPONSE,
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SSI_SD_PREP_DATA,
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SSI_SD_DATA_START,
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SSI_SD_DATA_READ,
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SSI_SD_DATA_CRC16,
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SSI_SD_DATA_WRITE,
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SSI_SD_SKIP_CRC16,
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} ssi_sd_mode;
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struct ssi_sd_state {
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SSIPeripheral ssidev;
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uint32_t mode;
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int cmd;
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uint8_t cmdarg[4];
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uint8_t response[5];
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uint16_t crc16;
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int32_t read_bytes;
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int32_t write_bytes;
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int32_t arglen;
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int32_t response_pos;
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int32_t stopping;
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SDBus sdbus;
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};
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#define TYPE_SSI_SD "ssi-sd"
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OBJECT_DECLARE_SIMPLE_TYPE(ssi_sd_state, SSI_SD)
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/* State word bits. */
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#define SSI_SDR_LOCKED 0x0001
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#define SSI_SDR_WP_ERASE 0x0002
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#define SSI_SDR_ERROR 0x0004
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#define SSI_SDR_CC_ERROR 0x0008
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#define SSI_SDR_ECC_FAILED 0x0010
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#define SSI_SDR_WP_VIOLATION 0x0020
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#define SSI_SDR_ERASE_PARAM 0x0040
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#define SSI_SDR_OUT_OF_RANGE 0x0080
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#define SSI_SDR_IDLE 0x0100
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#define SSI_SDR_ERASE_RESET 0x0200
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#define SSI_SDR_ILLEGAL_COMMAND 0x0400
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#define SSI_SDR_COM_CRC_ERROR 0x0800
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#define SSI_SDR_ERASE_SEQ_ERROR 0x1000
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#define SSI_SDR_ADDRESS_ERROR 0x2000
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#define SSI_SDR_PARAMETER_ERROR 0x4000
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/* multiple block write */
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#define SSI_TOKEN_MULTI_WRITE 0xfc
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/* terminate multiple block write */
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#define SSI_TOKEN_STOP_TRAN 0xfd
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/* single block read/write, multiple block read */
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#define SSI_TOKEN_SINGLE 0xfe
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/* dummy value - don't care */
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#define SSI_DUMMY 0xff
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/* data accepted */
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#define DATA_RESPONSE_ACCEPTED 0x05
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static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
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{
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ssi_sd_state *s = SSI_SD(dev);
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SDRequest request;
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uint8_t longresp[16];
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/*
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* Special case: allow CMD12 (STOP TRANSMISSION) while reading data.
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*
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* See "Physical Layer Specification Version 8.00" chapter 7.5.2.2,
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* to avoid conflict between CMD12 response and next data block,
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* timing of CMD12 should be controlled as follows:
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*
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* - CMD12 issued at the timing that end bit of CMD12 and end bit of
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* data block is overlapped
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* - CMD12 issued after one clock cycle after host receives a token
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* (either Start Block token or Data Error token)
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*
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* We need to catch CMD12 in all of the data read states.
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*/
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if (s->mode >= SSI_SD_PREP_DATA && s->mode <= SSI_SD_DATA_CRC16) {
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if (val == 0x4c) {
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s->mode = SSI_SD_CMD;
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/* There must be at least one byte delay before the card responds */
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s->stopping = 1;
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}
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}
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switch (s->mode) {
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case SSI_SD_CMD:
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switch (val) {
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case SSI_DUMMY:
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DPRINTF("NULL command\n");
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return SSI_DUMMY;
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break;
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case SSI_TOKEN_SINGLE:
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case SSI_TOKEN_MULTI_WRITE:
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DPRINTF("Start write block\n");
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s->mode = SSI_SD_DATA_WRITE;
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return SSI_DUMMY;
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case SSI_TOKEN_STOP_TRAN:
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DPRINTF("Stop multiple write\n");
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/* manually issue cmd12 to stop the transfer */
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request.cmd = 12;
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request.arg = 0;
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s->arglen = sdbus_do_command(&s->sdbus, &request, longresp);
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if (s->arglen <= 0) {
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s->arglen = 1;
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/* a zero value indicates the card is busy */
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s->response[0] = 0;
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DPRINTF("SD card busy\n");
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} else {
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s->arglen = 1;
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/* a non-zero value indicates the card is ready */
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s->response[0] = SSI_DUMMY;
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}
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return SSI_DUMMY;
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}
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s->cmd = val & 0x3f;
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s->mode = SSI_SD_CMDARG;
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s->arglen = 0;
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return SSI_DUMMY;
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case SSI_SD_CMDARG:
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if (s->arglen == 4) {
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/* FIXME: Check CRC. */
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request.cmd = s->cmd;
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request.arg = ldl_be_p(s->cmdarg);
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DPRINTF("CMD%d arg 0x%08x\n", s->cmd, request.arg);
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s->arglen = sdbus_do_command(&s->sdbus, &request, longresp);
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if (s->arglen <= 0) {
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s->arglen = 1;
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s->response[0] = 4;
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DPRINTF("SD command failed\n");
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} else if (s->cmd == 8 || s->cmd == 58) {
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/* CMD8/CMD58 returns R3/R7 response */
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DPRINTF("Returned R3/R7\n");
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s->arglen = 5;
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s->response[0] = 1;
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memcpy(&s->response[1], longresp, 4);
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} else if (s->arglen != 4) {
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BADF("Unexpected response to cmd %d\n", s->cmd);
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/* Illegal command is about as near as we can get. */
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s->arglen = 1;
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s->response[0] = 4;
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} else {
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/* All other commands return status. */
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uint32_t cardstatus;
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uint16_t status;
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/* CMD13 returns a 2-byte statuse work. Other commands
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only return the first byte. */
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s->arglen = (s->cmd == 13) ? 2 : 1;
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/* handle R1b */
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if (s->cmd == 28 || s->cmd == 29 || s->cmd == 38) {
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s->stopping = 1;
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}
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cardstatus = ldl_be_p(longresp);
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status = 0;
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if (((cardstatus >> 9) & 0xf) < 4)
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status |= SSI_SDR_IDLE;
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if (cardstatus & ERASE_RESET)
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status |= SSI_SDR_ERASE_RESET;
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if (cardstatus & ILLEGAL_COMMAND)
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status |= SSI_SDR_ILLEGAL_COMMAND;
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if (cardstatus & COM_CRC_ERROR)
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status |= SSI_SDR_COM_CRC_ERROR;
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if (cardstatus & ERASE_SEQ_ERROR)
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status |= SSI_SDR_ERASE_SEQ_ERROR;
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if (cardstatus & ADDRESS_ERROR)
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status |= SSI_SDR_ADDRESS_ERROR;
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if (cardstatus & CARD_IS_LOCKED)
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status |= SSI_SDR_LOCKED;
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if (cardstatus & (LOCK_UNLOCK_FAILED | WP_ERASE_SKIP))
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status |= SSI_SDR_WP_ERASE;
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if (cardstatus & SD_ERROR)
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status |= SSI_SDR_ERROR;
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if (cardstatus & CC_ERROR)
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status |= SSI_SDR_CC_ERROR;
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if (cardstatus & CARD_ECC_FAILED)
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status |= SSI_SDR_ECC_FAILED;
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if (cardstatus & WP_VIOLATION)
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status |= SSI_SDR_WP_VIOLATION;
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if (cardstatus & ERASE_PARAM)
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status |= SSI_SDR_ERASE_PARAM;
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if (cardstatus & (OUT_OF_RANGE | CID_CSD_OVERWRITE))
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status |= SSI_SDR_OUT_OF_RANGE;
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/* ??? Don't know what Parameter Error really means, so
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assume it's set if the second byte is nonzero. */
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if (status & 0xff)
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status |= SSI_SDR_PARAMETER_ERROR;
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s->response[0] = status >> 8;
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s->response[1] = status;
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DPRINTF("Card status 0x%02x\n", status);
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}
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s->mode = SSI_SD_PREP_RESP;
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s->response_pos = 0;
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} else {
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s->cmdarg[s->arglen++] = val;
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}
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return SSI_DUMMY;
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case SSI_SD_PREP_RESP:
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DPRINTF("Prepare card response (Ncr)\n");
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s->mode = SSI_SD_RESPONSE;
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return SSI_DUMMY;
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case SSI_SD_RESPONSE:
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if (s->response_pos < s->arglen) {
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DPRINTF("Response 0x%02x\n", s->response[s->response_pos]);
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return s->response[s->response_pos++];
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}
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if (s->stopping) {
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s->stopping = 0;
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s->mode = SSI_SD_CMD;
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return SSI_DUMMY;
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}
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if (sdbus_data_ready(&s->sdbus)) {
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DPRINTF("Data read\n");
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s->mode = SSI_SD_DATA_START;
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} else {
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DPRINTF("End of command\n");
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s->mode = SSI_SD_CMD;
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}
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return SSI_DUMMY;
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case SSI_SD_PREP_DATA:
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DPRINTF("Prepare data block (Nac)\n");
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s->mode = SSI_SD_DATA_START;
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return SSI_DUMMY;
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case SSI_SD_DATA_START:
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DPRINTF("Start read block\n");
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s->mode = SSI_SD_DATA_READ;
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s->response_pos = 0;
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return SSI_TOKEN_SINGLE;
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case SSI_SD_DATA_READ:
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val = sdbus_read_byte(&s->sdbus);
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s->read_bytes++;
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s->crc16 = crc_ccitt_false(s->crc16, (uint8_t *)&val, 1);
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if (!sdbus_data_ready(&s->sdbus) || s->read_bytes == 512) {
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DPRINTF("Data read end\n");
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s->mode = SSI_SD_DATA_CRC16;
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}
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return val;
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case SSI_SD_DATA_CRC16:
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val = (s->crc16 & 0xff00) >> 8;
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s->crc16 <<= 8;
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s->response_pos++;
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if (s->response_pos == 2) {
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DPRINTF("CRC16 read end\n");
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if (s->read_bytes == 512 && s->cmd != 17) {
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s->mode = SSI_SD_PREP_DATA;
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} else {
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s->mode = SSI_SD_CMD;
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}
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s->read_bytes = 0;
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s->response_pos = 0;
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}
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return val;
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case SSI_SD_DATA_WRITE:
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sdbus_write_byte(&s->sdbus, val);
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s->write_bytes++;
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if (!sdbus_receive_ready(&s->sdbus) || s->write_bytes == 512) {
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DPRINTF("Data write end\n");
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s->mode = SSI_SD_SKIP_CRC16;
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s->response_pos = 0;
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}
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return val;
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case SSI_SD_SKIP_CRC16:
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/* we don't verify the crc16 */
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s->response_pos++;
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if (s->response_pos == 2) {
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DPRINTF("CRC16 receive end\n");
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s->mode = SSI_SD_RESPONSE;
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s->write_bytes = 0;
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s->arglen = 1;
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s->response[0] = DATA_RESPONSE_ACCEPTED;
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s->response_pos = 0;
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}
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return SSI_DUMMY;
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}
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/* Should never happen. */
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return SSI_DUMMY;
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}
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static int ssi_sd_post_load(void *opaque, int version_id)
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{
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ssi_sd_state *s = (ssi_sd_state *)opaque;
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if (s->mode > SSI_SD_SKIP_CRC16) {
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return -EINVAL;
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}
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if (s->mode == SSI_SD_CMDARG &&
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(s->arglen < 0 || s->arglen >= ARRAY_SIZE(s->cmdarg))) {
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return -EINVAL;
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}
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if (s->mode == SSI_SD_RESPONSE &&
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(s->response_pos < 0 || s->response_pos >= ARRAY_SIZE(s->response) ||
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(!s->stopping && s->arglen > ARRAY_SIZE(s->response)))) {
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return -EINVAL;
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}
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return 0;
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}
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|
|
|
||
|
|
static const VMStateDescription vmstate_ssi_sd = {
|
||
|
|
.name = "ssi_sd",
|
||
|
|
.version_id = 7,
|
||
|
|
.minimum_version_id = 7,
|
||
|
|
.post_load = ssi_sd_post_load,
|
||
|
|
.fields = (VMStateField []) {
|
||
|
|
VMSTATE_UINT32(mode, ssi_sd_state),
|
||
|
|
VMSTATE_INT32(cmd, ssi_sd_state),
|
||
|
|
VMSTATE_UINT8_ARRAY(cmdarg, ssi_sd_state, 4),
|
||
|
|
VMSTATE_UINT8_ARRAY(response, ssi_sd_state, 5),
|
||
|
|
VMSTATE_UINT16(crc16, ssi_sd_state),
|
||
|
|
VMSTATE_INT32(read_bytes, ssi_sd_state),
|
||
|
|
VMSTATE_INT32(write_bytes, ssi_sd_state),
|
||
|
|
VMSTATE_INT32(arglen, ssi_sd_state),
|
||
|
|
VMSTATE_INT32(response_pos, ssi_sd_state),
|
||
|
|
VMSTATE_INT32(stopping, ssi_sd_state),
|
||
|
|
VMSTATE_SSI_PERIPHERAL(ssidev, ssi_sd_state),
|
||
|
|
VMSTATE_END_OF_LIST()
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
static void ssi_sd_realize(SSIPeripheral *d, Error **errp)
|
||
|
|
{
|
||
|
|
ssi_sd_state *s = SSI_SD(d);
|
||
|
|
|
||
|
|
qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SD_BUS, DEVICE(d), "sd-bus");
|
||
|
|
}
|
||
|
|
|
||
|
|
static void ssi_sd_reset(DeviceState *dev)
|
||
|
|
{
|
||
|
|
ssi_sd_state *s = SSI_SD(dev);
|
||
|
|
|
||
|
|
s->mode = SSI_SD_CMD;
|
||
|
|
s->cmd = 0;
|
||
|
|
memset(s->cmdarg, 0, sizeof(s->cmdarg));
|
||
|
|
memset(s->response, 0, sizeof(s->response));
|
||
|
|
s->crc16 = 0;
|
||
|
|
s->read_bytes = 0;
|
||
|
|
s->write_bytes = 0;
|
||
|
|
s->arglen = 0;
|
||
|
|
s->response_pos = 0;
|
||
|
|
s->stopping = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void ssi_sd_class_init(ObjectClass *klass, void *data)
|
||
|
|
{
|
||
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
||
|
|
SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass);
|
||
|
|
|
||
|
|
k->realize = ssi_sd_realize;
|
||
|
|
k->transfer = ssi_sd_transfer;
|
||
|
|
k->cs_polarity = SSI_CS_LOW;
|
||
|
|
dc->vmsd = &vmstate_ssi_sd;
|
||
|
|
dc->reset = ssi_sd_reset;
|
||
|
|
/* Reason: GPIO chip-select line should be wired up */
|
||
|
|
dc->user_creatable = false;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const TypeInfo ssi_sd_info = {
|
||
|
|
.name = TYPE_SSI_SD,
|
||
|
|
.parent = TYPE_SSI_PERIPHERAL,
|
||
|
|
.instance_size = sizeof(ssi_sd_state),
|
||
|
|
.class_init = ssi_sd_class_init,
|
||
|
|
};
|
||
|
|
|
||
|
|
static void ssi_sd_register_types(void)
|
||
|
|
{
|
||
|
|
type_register_static(&ssi_sd_info);
|
||
|
|
}
|
||
|
|
|
||
|
|
type_init(ssi_sd_register_types)
|