440 lines
16 KiB
C
440 lines
16 KiB
C
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/*
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* Raspberry Pi emulation (c) 2012 Gregory Estrade
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* Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
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*
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* Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
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* Written by Andrew Baumann
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "hw/arm/bcm2835_peripherals.h"
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#include "hw/misc/bcm2835_mbox_defs.h"
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#include "hw/arm/raspi_platform.h"
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#include "sysemu/sysemu.h"
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/* Peripheral base address on the VC (GPU) system bus */
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#define BCM2835_VC_PERI_BASE 0x7e000000
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/* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
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#define BCM2835_SDHC_CAPAREG 0x52134b4
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/*
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* According to Linux driver & DTS, dma channels 0--10 have separate IRQ,
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* while channels 11--14 share one IRQ:
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*/
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#define SEPARATE_DMA_IRQ_MAX 10
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#define ORGATED_DMA_IRQ_COUNT 4
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static void create_unimp(BCM2835PeripheralState *ps,
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UnimplementedDeviceState *uds,
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const char *name, hwaddr ofs, hwaddr size)
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{
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object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
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qdev_prop_set_string(DEVICE(uds), "name", name);
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qdev_prop_set_uint64(DEVICE(uds), "size", size);
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sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
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memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
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}
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static void bcm2835_peripherals_init(Object *obj)
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{
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BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
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/* Memory region for peripheral devices, which we export to our parent */
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memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
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sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
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/* Internal memory region for peripheral bus addresses (not exported) */
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memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
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/* Internal memory region for request/response communication with
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* mailbox-addressable peripherals (not exported)
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*/
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memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
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MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
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/* Interrupt Controller */
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object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
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/* SYS Timer */
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object_initialize_child(obj, "systimer", &s->systmr,
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TYPE_BCM2835_SYSTIMER);
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/* UART0 */
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object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
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/* AUX / UART1 */
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object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
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/* Mailboxes */
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object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
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object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
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OBJECT(&s->mbox_mr));
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/* Framebuffer */
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object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
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object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
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object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
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OBJECT(&s->gpu_bus_mr));
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/* Property channel */
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object_initialize_child(obj, "property", &s->property,
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TYPE_BCM2835_PROPERTY);
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object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
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"board-rev");
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object_property_add_const_link(OBJECT(&s->property), "fb",
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OBJECT(&s->fb));
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object_property_add_const_link(OBJECT(&s->property), "dma-mr",
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OBJECT(&s->gpu_bus_mr));
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/* Random Number Generator */
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object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
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/* Extended Mass Media Controller */
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object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
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/* SDHOST */
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object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
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/* DMA Channels */
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object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
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object_initialize_child(obj, "orgated-dma-irq",
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&s->orgated_dma_irq, TYPE_OR_IRQ);
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object_property_set_int(OBJECT(&s->orgated_dma_irq), "num-lines",
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ORGATED_DMA_IRQ_COUNT, &error_abort);
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object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
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OBJECT(&s->gpu_bus_mr));
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/* Thermal */
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object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
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/* GPIO */
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object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
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object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
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OBJECT(&s->sdhci.sdbus));
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object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
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OBJECT(&s->sdhost.sdbus));
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/* Mphi */
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object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
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/* DWC2 */
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object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
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/* CPRMAN clock manager */
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object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
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object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
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OBJECT(&s->gpu_bus_mr));
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/* Power Management */
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object_initialize_child(obj, "powermgt", &s->powermgt,
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TYPE_BCM2835_POWERMGT);
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}
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static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
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{
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BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
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Object *obj;
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MemoryRegion *ram;
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Error *err = NULL;
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uint64_t ram_size, vcram_size;
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int n;
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obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
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ram = MEMORY_REGION(obj);
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ram_size = memory_region_size(ram);
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/* Map peripherals and RAM into the GPU address space. */
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memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
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"bcm2835-peripherals", &s->peri_mr, 0,
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memory_region_size(&s->peri_mr));
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memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
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&s->peri_mr_alias, 1);
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/* RAM is aliased four times (different cache configurations) on the GPU */
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for (n = 0; n < 4; n++) {
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memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
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"bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
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memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
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&s->ram_alias[n], 0);
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}
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/* Interrupt Controller */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
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return;
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}
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/* CPRMAN clock manager */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
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qdev_connect_clock_in(DEVICE(&s->uart0), "clk",
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qdev_get_clock_out(DEVICE(&s->cprman), "uart-out"));
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memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
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sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
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/* Sys Timer */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_TIMER0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_TIMER1));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_TIMER2));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_TIMER3));
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/* UART0 */
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qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_UART0));
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/* AUX / UART1 */
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qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_AUX));
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/* Mailboxes */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
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INTERRUPT_ARM_MAILBOX));
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/* Framebuffer */
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vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base",
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ram_size - vcram_size, errp)) {
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return;
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}
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
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return;
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}
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memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
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qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
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/* Property channel */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
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return;
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}
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memory_region_add_subregion(&s->mbox_mr,
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MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
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qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
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/* Random Number Generator */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, RNG_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
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/* Extended Mass Media Controller
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*
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* Compatible with:
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* - SD Host Controller Specification Version 3.0 Draft 1.0
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* - SDIO Specification Version 3.0
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* - MMC Specification Version 4.4
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*
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* For the exact details please refer to the Arasan documentation:
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* SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
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*/
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object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
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&error_abort);
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object_property_set_uint(OBJECT(&s->sdhci), "capareg",
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BCM2835_SDHC_CAPAREG, &error_abort);
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object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
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&error_abort);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_ARASANSDIO));
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/* SDHOST */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
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return;
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}
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memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
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||
|
|
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
|
||
|
|
INTERRUPT_SDIO));
|
||
|
|
|
||
|
|
/* DMA Channels */
|
||
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
|
||
|
|
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
|
||
|
|
memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
|
||
|
|
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
|
||
|
|
|
||
|
|
for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) {
|
||
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
|
||
|
|
qdev_get_gpio_in_named(DEVICE(&s->ic),
|
||
|
|
BCM2835_IC_GPU_IRQ,
|
||
|
|
INTERRUPT_DMA0 + n));
|
||
|
|
}
|
||
|
|
if (!qdev_realize(DEVICE(&s->orgated_dma_irq), NULL, errp)) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) {
|
||
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma),
|
||
|
|
SEPARATE_DMA_IRQ_MAX + 1 + n,
|
||
|
|
qdev_get_gpio_in(DEVICE(&s->orgated_dma_irq), n));
|
||
|
|
}
|
||
|
|
qdev_connect_gpio_out(DEVICE(&s->orgated_dma_irq), 0,
|
||
|
|
qdev_get_gpio_in_named(DEVICE(&s->ic),
|
||
|
|
BCM2835_IC_GPU_IRQ,
|
||
|
|
INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1));
|
||
|
|
|
||
|
|
/* THERMAL */
|
||
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
|
||
|
|
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
|
||
|
|
|
||
|
|
/* GPIO */
|
||
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET,
|
||
|
|
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
|
||
|
|
|
||
|
|
object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
|
||
|
|
|
||
|
|
/* Mphi */
|
||
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
|
||
|
|
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
|
||
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
|
||
|
|
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
|
||
|
|
INTERRUPT_HOSTPORT));
|
||
|
|
|
||
|
|
/* DWC2 */
|
||
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
|
||
|
|
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
|
||
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
|
||
|
|
qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
|
||
|
|
INTERRUPT_USB));
|
||
|
|
|
||
|
|
/* Power Management */
|
||
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
memory_region_add_subregion(&s->peri_mr, PM_OFFSET,
|
||
|
|
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0));
|
||
|
|
|
||
|
|
create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
|
||
|
|
create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
|
||
|
|
create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
|
||
|
|
create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
|
||
|
|
create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
|
||
|
|
create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
|
||
|
|
create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
|
||
|
|
create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
|
||
|
|
create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
|
||
|
|
create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
|
||
|
|
create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
|
||
|
|
create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
|
||
|
|
create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
|
||
|
|
create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
|
||
|
|
{
|
||
|
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
||
|
|
|
||
|
|
dc->realize = bcm2835_peripherals_realize;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const TypeInfo bcm2835_peripherals_type_info = {
|
||
|
|
.name = TYPE_BCM2835_PERIPHERALS,
|
||
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
||
|
|
.instance_size = sizeof(BCM2835PeripheralState),
|
||
|
|
.instance_init = bcm2835_peripherals_init,
|
||
|
|
.class_init = bcm2835_peripherals_class_init,
|
||
|
|
};
|
||
|
|
|
||
|
|
static void bcm2835_peripherals_register_types(void)
|
||
|
|
{
|
||
|
|
type_register_static(&bcm2835_peripherals_type_info);
|
||
|
|
}
|
||
|
|
|
||
|
|
type_init(bcm2835_peripherals_register_types)
|