605 lines
19 KiB
C++
605 lines
19 KiB
C++
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//===-- tsan_rtl_access.cpp -----------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of ThreadSanitizer (TSan), a race detector.
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//
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// Definitions of memory access and function entry/exit entry points.
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//===----------------------------------------------------------------------===//
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#include "tsan_rtl.h"
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namespace __tsan {
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namespace v3 {
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ALWAYS_INLINE USED bool TryTraceMemoryAccess(ThreadState *thr, uptr pc,
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uptr addr, uptr size,
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AccessType typ) {
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DCHECK(size == 1 || size == 2 || size == 4 || size == 8);
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if (!kCollectHistory)
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return true;
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EventAccess *ev;
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if (UNLIKELY(!TraceAcquire(thr, &ev)))
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return false;
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u64 size_log = size == 1 ? 0 : size == 2 ? 1 : size == 4 ? 2 : 3;
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uptr pc_delta = pc - thr->trace_prev_pc + (1 << (EventAccess::kPCBits - 1));
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thr->trace_prev_pc = pc;
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if (LIKELY(pc_delta < (1 << EventAccess::kPCBits))) {
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ev->is_access = 1;
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ev->is_read = !!(typ & kAccessRead);
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ev->is_atomic = !!(typ & kAccessAtomic);
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ev->size_log = size_log;
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ev->pc_delta = pc_delta;
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DCHECK_EQ(ev->pc_delta, pc_delta);
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ev->addr = CompressAddr(addr);
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TraceRelease(thr, ev);
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return true;
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}
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auto *evex = reinterpret_cast<EventAccessExt *>(ev);
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evex->is_access = 0;
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evex->is_func = 0;
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evex->type = EventType::kAccessExt;
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evex->is_read = !!(typ & kAccessRead);
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evex->is_atomic = !!(typ & kAccessAtomic);
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evex->size_log = size_log;
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evex->addr = CompressAddr(addr);
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evex->pc = pc;
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TraceRelease(thr, evex);
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return true;
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}
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ALWAYS_INLINE USED bool TryTraceMemoryAccessRange(ThreadState *thr, uptr pc,
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uptr addr, uptr size,
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AccessType typ) {
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if (!kCollectHistory)
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return true;
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EventAccessRange *ev;
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if (UNLIKELY(!TraceAcquire(thr, &ev)))
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return false;
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thr->trace_prev_pc = pc;
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ev->is_access = 0;
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ev->is_func = 0;
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ev->type = EventType::kAccessRange;
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ev->is_read = !!(typ & kAccessRead);
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ev->is_free = !!(typ & kAccessFree);
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ev->size_lo = size;
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ev->pc = CompressAddr(pc);
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ev->addr = CompressAddr(addr);
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ev->size_hi = size >> EventAccessRange::kSizeLoBits;
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TraceRelease(thr, ev);
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return true;
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}
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void TraceMemoryAccessRange(ThreadState *thr, uptr pc, uptr addr, uptr size,
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AccessType typ) {
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if (LIKELY(TryTraceMemoryAccessRange(thr, pc, addr, size, typ)))
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return;
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TraceSwitchPart(thr);
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UNUSED bool res = TryTraceMemoryAccessRange(thr, pc, addr, size, typ);
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DCHECK(res);
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}
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void TraceFunc(ThreadState *thr, uptr pc) {
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if (LIKELY(TryTraceFunc(thr, pc)))
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return;
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TraceSwitchPart(thr);
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UNUSED bool res = TryTraceFunc(thr, pc);
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DCHECK(res);
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}
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void TraceMutexLock(ThreadState *thr, EventType type, uptr pc, uptr addr,
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StackID stk) {
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DCHECK(type == EventType::kLock || type == EventType::kRLock);
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if (!kCollectHistory)
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return;
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EventLock ev;
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ev.is_access = 0;
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ev.is_func = 0;
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ev.type = type;
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ev.pc = CompressAddr(pc);
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ev.stack_lo = stk;
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ev.stack_hi = stk >> EventLock::kStackIDLoBits;
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ev._ = 0;
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ev.addr = CompressAddr(addr);
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TraceEvent(thr, ev);
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}
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void TraceMutexUnlock(ThreadState *thr, uptr addr) {
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if (!kCollectHistory)
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return;
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EventUnlock ev;
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ev.is_access = 0;
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ev.is_func = 0;
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ev.type = EventType::kUnlock;
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ev._ = 0;
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ev.addr = CompressAddr(addr);
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TraceEvent(thr, ev);
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}
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void TraceTime(ThreadState *thr) {
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if (!kCollectHistory)
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return;
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EventTime ev;
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ev.is_access = 0;
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ev.is_func = 0;
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ev.type = EventType::kTime;
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ev.sid = static_cast<u64>(thr->sid);
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ev.epoch = static_cast<u64>(thr->epoch);
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ev._ = 0;
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TraceEvent(thr, ev);
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}
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} // namespace v3
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ALWAYS_INLINE
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Shadow LoadShadow(u64 *p) {
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u64 raw = atomic_load((atomic_uint64_t *)p, memory_order_relaxed);
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return Shadow(raw);
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}
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ALWAYS_INLINE
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void StoreShadow(u64 *sp, u64 s) {
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atomic_store((atomic_uint64_t *)sp, s, memory_order_relaxed);
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}
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ALWAYS_INLINE
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void StoreIfNotYetStored(u64 *sp, u64 *s) {
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StoreShadow(sp, *s);
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*s = 0;
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}
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extern "C" void __tsan_report_race();
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ALWAYS_INLINE
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void HandleRace(ThreadState *thr, u64 *shadow_mem, Shadow cur, Shadow old) {
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thr->racy_state[0] = cur.raw();
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thr->racy_state[1] = old.raw();
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thr->racy_shadow_addr = shadow_mem;
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#if !SANITIZER_GO
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HACKY_CALL(__tsan_report_race);
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#else
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ReportRace(thr);
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#endif
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}
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static inline bool HappensBefore(Shadow old, ThreadState *thr) {
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return thr->clock.get(old.TidWithIgnore()) >= old.epoch();
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}
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ALWAYS_INLINE
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void MemoryAccessImpl1(ThreadState *thr, uptr addr, int kAccessSizeLog,
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bool kAccessIsWrite, bool kIsAtomic, u64 *shadow_mem,
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Shadow cur) {
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// This potentially can live in an MMX/SSE scratch register.
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// The required intrinsics are:
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// __m128i _mm_move_epi64(__m128i*);
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// _mm_storel_epi64(u64*, __m128i);
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u64 store_word = cur.raw();
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bool stored = false;
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// scan all the shadow values and dispatch to 4 categories:
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// same, replace, candidate and race (see comments below).
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// we consider only 3 cases regarding access sizes:
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// equal, intersect and not intersect. initially I considered
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// larger and smaller as well, it allowed to replace some
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// 'candidates' with 'same' or 'replace', but I think
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// it's just not worth it (performance- and complexity-wise).
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Shadow old(0);
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// It release mode we manually unroll the loop,
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// because empirically gcc generates better code this way.
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// However, we can't afford unrolling in debug mode, because the function
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// consumes almost 4K of stack. Gtest gives only 4K of stack to death test
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// threads, which is not enough for the unrolled loop.
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#if SANITIZER_DEBUG
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for (int idx = 0; idx < 4; idx++) {
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# include "tsan_update_shadow_word.inc"
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}
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#else
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int idx = 0;
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# include "tsan_update_shadow_word.inc"
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idx = 1;
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if (stored) {
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# include "tsan_update_shadow_word.inc"
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} else {
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# include "tsan_update_shadow_word.inc"
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}
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idx = 2;
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if (stored) {
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# include "tsan_update_shadow_word.inc"
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} else {
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# include "tsan_update_shadow_word.inc"
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}
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idx = 3;
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if (stored) {
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# include "tsan_update_shadow_word.inc"
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} else {
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# include "tsan_update_shadow_word.inc"
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}
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#endif
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// we did not find any races and had already stored
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// the current access info, so we are done
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if (LIKELY(stored))
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return;
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// choose a random candidate slot and replace it
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StoreShadow(shadow_mem + (cur.epoch() % kShadowCnt), store_word);
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return;
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RACE:
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HandleRace(thr, shadow_mem, cur, old);
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return;
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}
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void UnalignedMemoryAccess(ThreadState *thr, uptr pc, uptr addr, uptr size,
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AccessType typ) {
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DCHECK(!(typ & kAccessAtomic));
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const bool kAccessIsWrite = !(typ & kAccessRead);
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const bool kIsAtomic = false;
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while (size) {
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int size1 = 1;
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int kAccessSizeLog = kSizeLog1;
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if (size >= 8 && (addr & ~7) == ((addr + 7) & ~7)) {
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size1 = 8;
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kAccessSizeLog = kSizeLog8;
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} else if (size >= 4 && (addr & ~7) == ((addr + 3) & ~7)) {
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size1 = 4;
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kAccessSizeLog = kSizeLog4;
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} else if (size >= 2 && (addr & ~7) == ((addr + 1) & ~7)) {
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size1 = 2;
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kAccessSizeLog = kSizeLog2;
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}
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MemoryAccess(thr, pc, addr, kAccessSizeLog, kAccessIsWrite, kIsAtomic);
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addr += size1;
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size -= size1;
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}
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}
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ALWAYS_INLINE
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bool ContainsSameAccessSlow(u64 *s, u64 a, u64 sync_epoch, bool is_write) {
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Shadow cur(a);
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for (uptr i = 0; i < kShadowCnt; i++) {
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Shadow old(LoadShadow(&s[i]));
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if (Shadow::Addr0AndSizeAreEqual(cur, old) &&
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old.TidWithIgnore() == cur.TidWithIgnore() &&
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old.epoch() > sync_epoch && old.IsAtomic() == cur.IsAtomic() &&
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old.IsRead() <= cur.IsRead())
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return true;
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}
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return false;
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}
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#if TSAN_VECTORIZE
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# define SHUF(v0, v1, i0, i1, i2, i3) \
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_mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(v0), \
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_mm_castsi128_ps(v1), \
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(i0)*1 + (i1)*4 + (i2)*16 + (i3)*64))
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ALWAYS_INLINE
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bool ContainsSameAccessFast(u64 *s, u64 a, u64 sync_epoch, bool is_write) {
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// This is an optimized version of ContainsSameAccessSlow.
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// load current access into access[0:63]
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const m128 access = _mm_cvtsi64_si128(a);
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// duplicate high part of access in addr0:
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// addr0[0:31] = access[32:63]
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// addr0[32:63] = access[32:63]
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// addr0[64:95] = access[32:63]
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// addr0[96:127] = access[32:63]
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const m128 addr0 = SHUF(access, access, 1, 1, 1, 1);
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// load 4 shadow slots
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const m128 shadow0 = _mm_load_si128((__m128i *)s);
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const m128 shadow1 = _mm_load_si128((__m128i *)s + 1);
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// load high parts of 4 shadow slots into addr_vect:
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// addr_vect[0:31] = shadow0[32:63]
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// addr_vect[32:63] = shadow0[96:127]
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// addr_vect[64:95] = shadow1[32:63]
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// addr_vect[96:127] = shadow1[96:127]
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m128 addr_vect = SHUF(shadow0, shadow1, 1, 3, 1, 3);
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if (!is_write) {
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// set IsRead bit in addr_vect
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const m128 rw_mask1 = _mm_cvtsi64_si128(1 << 15);
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const m128 rw_mask = SHUF(rw_mask1, rw_mask1, 0, 0, 0, 0);
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addr_vect = _mm_or_si128(addr_vect, rw_mask);
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}
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// addr0 == addr_vect?
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const m128 addr_res = _mm_cmpeq_epi32(addr0, addr_vect);
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// epoch1[0:63] = sync_epoch
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const m128 epoch1 = _mm_cvtsi64_si128(sync_epoch);
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// epoch[0:31] = sync_epoch[0:31]
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// epoch[32:63] = sync_epoch[0:31]
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// epoch[64:95] = sync_epoch[0:31]
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// epoch[96:127] = sync_epoch[0:31]
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const m128 epoch = SHUF(epoch1, epoch1, 0, 0, 0, 0);
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// load low parts of shadow cell epochs into epoch_vect:
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// epoch_vect[0:31] = shadow0[0:31]
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// epoch_vect[32:63] = shadow0[64:95]
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// epoch_vect[64:95] = shadow1[0:31]
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// epoch_vect[96:127] = shadow1[64:95]
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const m128 epoch_vect = SHUF(shadow0, shadow1, 0, 2, 0, 2);
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// epoch_vect >= sync_epoch?
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const m128 epoch_res = _mm_cmpgt_epi32(epoch_vect, epoch);
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// addr_res & epoch_res
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const m128 res = _mm_and_si128(addr_res, epoch_res);
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// mask[0] = res[7]
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// mask[1] = res[15]
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// ...
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// mask[15] = res[127]
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const int mask = _mm_movemask_epi8(res);
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return mask != 0;
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}
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#endif
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ALWAYS_INLINE
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bool ContainsSameAccess(u64 *s, u64 a, u64 sync_epoch, bool is_write) {
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#if TSAN_VECTORIZE
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bool res = ContainsSameAccessFast(s, a, sync_epoch, is_write);
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// NOTE: this check can fail if the shadow is concurrently mutated
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// by other threads. But it still can be useful if you modify
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// ContainsSameAccessFast and want to ensure that it's not completely broken.
|
||
|
|
// DCHECK_EQ(res, ContainsSameAccessSlow(s, a, sync_epoch, is_write));
|
||
|
|
return res;
|
||
|
|
#else
|
||
|
|
return ContainsSameAccessSlow(s, a, sync_epoch, is_write);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
ALWAYS_INLINE USED void MemoryAccess(ThreadState *thr, uptr pc, uptr addr,
|
||
|
|
int kAccessSizeLog, bool kAccessIsWrite,
|
||
|
|
bool kIsAtomic) {
|
||
|
|
RawShadow *shadow_mem = MemToShadow(addr);
|
||
|
|
DPrintf2(
|
||
|
|
"#%d: MemoryAccess: @%p %p size=%d"
|
||
|
|
" is_write=%d shadow_mem=%p {%zx, %zx, %zx, %zx}\n",
|
||
|
|
(int)thr->fast_state.tid(), (void *)pc, (void *)addr,
|
||
|
|
(int)(1 << kAccessSizeLog), kAccessIsWrite, shadow_mem,
|
||
|
|
(uptr)shadow_mem[0], (uptr)shadow_mem[1], (uptr)shadow_mem[2],
|
||
|
|
(uptr)shadow_mem[3]);
|
||
|
|
#if SANITIZER_DEBUG
|
||
|
|
if (!IsAppMem(addr)) {
|
||
|
|
Printf("Access to non app mem %zx\n", addr);
|
||
|
|
DCHECK(IsAppMem(addr));
|
||
|
|
}
|
||
|
|
if (!IsShadowMem(shadow_mem)) {
|
||
|
|
Printf("Bad shadow addr %p (%zx)\n", shadow_mem, addr);
|
||
|
|
DCHECK(IsShadowMem(shadow_mem));
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
if (!SANITIZER_GO && !kAccessIsWrite && *shadow_mem == kShadowRodata) {
|
||
|
|
// Access to .rodata section, no races here.
|
||
|
|
// Measurements show that it can be 10-20% of all memory accesses.
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
FastState fast_state = thr->fast_state;
|
||
|
|
if (UNLIKELY(fast_state.GetIgnoreBit())) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
Shadow cur(fast_state);
|
||
|
|
cur.SetAddr0AndSizeLog(addr & 7, kAccessSizeLog);
|
||
|
|
cur.SetWrite(kAccessIsWrite);
|
||
|
|
cur.SetAtomic(kIsAtomic);
|
||
|
|
|
||
|
|
if (LIKELY(ContainsSameAccess(shadow_mem, cur.raw(), thr->fast_synch_epoch,
|
||
|
|
kAccessIsWrite))) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (kCollectHistory) {
|
||
|
|
fast_state.IncrementEpoch();
|
||
|
|
thr->fast_state = fast_state;
|
||
|
|
TraceAddEvent(thr, fast_state, EventTypeMop, pc);
|
||
|
|
cur.IncrementEpoch();
|
||
|
|
}
|
||
|
|
|
||
|
|
MemoryAccessImpl1(thr, addr, kAccessSizeLog, kAccessIsWrite, kIsAtomic,
|
||
|
|
shadow_mem, cur);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Called by MemoryAccessRange in tsan_rtl_thread.cpp
|
||
|
|
ALWAYS_INLINE USED void MemoryAccessImpl(ThreadState *thr, uptr addr,
|
||
|
|
int kAccessSizeLog,
|
||
|
|
bool kAccessIsWrite, bool kIsAtomic,
|
||
|
|
u64 *shadow_mem, Shadow cur) {
|
||
|
|
if (LIKELY(ContainsSameAccess(shadow_mem, cur.raw(), thr->fast_synch_epoch,
|
||
|
|
kAccessIsWrite))) {
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
MemoryAccessImpl1(thr, addr, kAccessSizeLog, kAccessIsWrite, kIsAtomic,
|
||
|
|
shadow_mem, cur);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void MemoryRangeSet(ThreadState *thr, uptr pc, uptr addr, uptr size,
|
||
|
|
u64 val) {
|
||
|
|
(void)thr;
|
||
|
|
(void)pc;
|
||
|
|
if (size == 0)
|
||
|
|
return;
|
||
|
|
// FIXME: fix me.
|
||
|
|
uptr offset = addr % kShadowCell;
|
||
|
|
if (offset) {
|
||
|
|
offset = kShadowCell - offset;
|
||
|
|
if (size <= offset)
|
||
|
|
return;
|
||
|
|
addr += offset;
|
||
|
|
size -= offset;
|
||
|
|
}
|
||
|
|
DCHECK_EQ(addr % 8, 0);
|
||
|
|
// If a user passes some insane arguments (memset(0)),
|
||
|
|
// let it just crash as usual.
|
||
|
|
if (!IsAppMem(addr) || !IsAppMem(addr + size - 1))
|
||
|
|
return;
|
||
|
|
// Don't want to touch lots of shadow memory.
|
||
|
|
// If a program maps 10MB stack, there is no need reset the whole range.
|
||
|
|
size = (size + (kShadowCell - 1)) & ~(kShadowCell - 1);
|
||
|
|
// UnmapOrDie/MmapFixedNoReserve does not work on Windows.
|
||
|
|
if (SANITIZER_WINDOWS || size < common_flags()->clear_shadow_mmap_threshold) {
|
||
|
|
RawShadow *p = MemToShadow(addr);
|
||
|
|
CHECK(IsShadowMem(p));
|
||
|
|
CHECK(IsShadowMem(p + size * kShadowCnt / kShadowCell - 1));
|
||
|
|
// FIXME: may overwrite a part outside the region
|
||
|
|
for (uptr i = 0; i < size / kShadowCell * kShadowCnt;) {
|
||
|
|
p[i++] = val;
|
||
|
|
for (uptr j = 1; j < kShadowCnt; j++) p[i++] = 0;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
// The region is big, reset only beginning and end.
|
||
|
|
const uptr kPageSize = GetPageSizeCached();
|
||
|
|
RawShadow *begin = MemToShadow(addr);
|
||
|
|
RawShadow *end = begin + size / kShadowCell * kShadowCnt;
|
||
|
|
RawShadow *p = begin;
|
||
|
|
// Set at least first kPageSize/2 to page boundary.
|
||
|
|
while ((p < begin + kPageSize / kShadowSize / 2) || ((uptr)p % kPageSize)) {
|
||
|
|
*p++ = val;
|
||
|
|
for (uptr j = 1; j < kShadowCnt; j++) *p++ = 0;
|
||
|
|
}
|
||
|
|
// Reset middle part.
|
||
|
|
RawShadow *p1 = p;
|
||
|
|
p = RoundDown(end, kPageSize);
|
||
|
|
if (!MmapFixedSuperNoReserve((uptr)p1, (uptr)p - (uptr)p1))
|
||
|
|
Die();
|
||
|
|
// Set the ending.
|
||
|
|
while (p < end) {
|
||
|
|
*p++ = val;
|
||
|
|
for (uptr j = 1; j < kShadowCnt; j++) *p++ = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void MemoryResetRange(ThreadState *thr, uptr pc, uptr addr, uptr size) {
|
||
|
|
MemoryRangeSet(thr, pc, addr, size, 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
void MemoryRangeFreed(ThreadState *thr, uptr pc, uptr addr, uptr size) {
|
||
|
|
// Processing more than 1k (4k of shadow) is expensive,
|
||
|
|
// can cause excessive memory consumption (user does not necessary touch
|
||
|
|
// the whole range) and most likely unnecessary.
|
||
|
|
if (size > 1024)
|
||
|
|
size = 1024;
|
||
|
|
CHECK_EQ(thr->is_freeing, false);
|
||
|
|
thr->is_freeing = true;
|
||
|
|
MemoryAccessRange(thr, pc, addr, size, true);
|
||
|
|
thr->is_freeing = false;
|
||
|
|
if (kCollectHistory) {
|
||
|
|
thr->fast_state.IncrementEpoch();
|
||
|
|
TraceAddEvent(thr, thr->fast_state, EventTypeMop, pc);
|
||
|
|
}
|
||
|
|
Shadow s(thr->fast_state);
|
||
|
|
s.ClearIgnoreBit();
|
||
|
|
s.MarkAsFreed();
|
||
|
|
s.SetWrite(true);
|
||
|
|
s.SetAddr0AndSizeLog(0, 3);
|
||
|
|
MemoryRangeSet(thr, pc, addr, size, s.raw());
|
||
|
|
}
|
||
|
|
|
||
|
|
void MemoryRangeImitateWrite(ThreadState *thr, uptr pc, uptr addr, uptr size) {
|
||
|
|
if (kCollectHistory) {
|
||
|
|
thr->fast_state.IncrementEpoch();
|
||
|
|
TraceAddEvent(thr, thr->fast_state, EventTypeMop, pc);
|
||
|
|
}
|
||
|
|
Shadow s(thr->fast_state);
|
||
|
|
s.ClearIgnoreBit();
|
||
|
|
s.SetWrite(true);
|
||
|
|
s.SetAddr0AndSizeLog(0, 3);
|
||
|
|
MemoryRangeSet(thr, pc, addr, size, s.raw());
|
||
|
|
}
|
||
|
|
|
||
|
|
void MemoryRangeImitateWriteOrResetRange(ThreadState *thr, uptr pc, uptr addr,
|
||
|
|
uptr size) {
|
||
|
|
if (thr->ignore_reads_and_writes == 0)
|
||
|
|
MemoryRangeImitateWrite(thr, pc, addr, size);
|
||
|
|
else
|
||
|
|
MemoryResetRange(thr, pc, addr, size);
|
||
|
|
}
|
||
|
|
|
||
|
|
void MemoryAccessRange(ThreadState *thr, uptr pc, uptr addr, uptr size,
|
||
|
|
bool is_write) {
|
||
|
|
if (size == 0)
|
||
|
|
return;
|
||
|
|
|
||
|
|
RawShadow *shadow_mem = MemToShadow(addr);
|
||
|
|
DPrintf2("#%d: MemoryAccessRange: @%p %p size=%d is_write=%d\n", thr->tid,
|
||
|
|
(void *)pc, (void *)addr, (int)size, is_write);
|
||
|
|
|
||
|
|
#if SANITIZER_DEBUG
|
||
|
|
if (!IsAppMem(addr)) {
|
||
|
|
Printf("Access to non app mem %zx\n", addr);
|
||
|
|
DCHECK(IsAppMem(addr));
|
||
|
|
}
|
||
|
|
if (!IsAppMem(addr + size - 1)) {
|
||
|
|
Printf("Access to non app mem %zx\n", addr + size - 1);
|
||
|
|
DCHECK(IsAppMem(addr + size - 1));
|
||
|
|
}
|
||
|
|
if (!IsShadowMem(shadow_mem)) {
|
||
|
|
Printf("Bad shadow addr %p (%zx)\n", shadow_mem, addr);
|
||
|
|
DCHECK(IsShadowMem(shadow_mem));
|
||
|
|
}
|
||
|
|
if (!IsShadowMem(shadow_mem + size * kShadowCnt / 8 - 1)) {
|
||
|
|
Printf("Bad shadow addr %p (%zx)\n", shadow_mem + size * kShadowCnt / 8 - 1,
|
||
|
|
addr + size - 1);
|
||
|
|
DCHECK(IsShadowMem(shadow_mem + size * kShadowCnt / 8 - 1));
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
if (*shadow_mem == kShadowRodata) {
|
||
|
|
DCHECK(!is_write);
|
||
|
|
// Access to .rodata section, no races here.
|
||
|
|
// Measurements show that it can be 10-20% of all memory accesses.
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
FastState fast_state = thr->fast_state;
|
||
|
|
if (fast_state.GetIgnoreBit())
|
||
|
|
return;
|
||
|
|
|
||
|
|
fast_state.IncrementEpoch();
|
||
|
|
thr->fast_state = fast_state;
|
||
|
|
TraceAddEvent(thr, fast_state, EventTypeMop, pc);
|
||
|
|
|
||
|
|
bool unaligned = (addr % kShadowCell) != 0;
|
||
|
|
|
||
|
|
// Handle unaligned beginning, if any.
|
||
|
|
for (; addr % kShadowCell && size; addr++, size--) {
|
||
|
|
int const kAccessSizeLog = 0;
|
||
|
|
Shadow cur(fast_state);
|
||
|
|
cur.SetWrite(is_write);
|
||
|
|
cur.SetAddr0AndSizeLog(addr & (kShadowCell - 1), kAccessSizeLog);
|
||
|
|
MemoryAccessImpl(thr, addr, kAccessSizeLog, is_write, false, shadow_mem,
|
||
|
|
cur);
|
||
|
|
}
|
||
|
|
if (unaligned)
|
||
|
|
shadow_mem += kShadowCnt;
|
||
|
|
// Handle middle part, if any.
|
||
|
|
for (; size >= kShadowCell; addr += kShadowCell, size -= kShadowCell) {
|
||
|
|
int const kAccessSizeLog = 3;
|
||
|
|
Shadow cur(fast_state);
|
||
|
|
cur.SetWrite(is_write);
|
||
|
|
cur.SetAddr0AndSizeLog(0, kAccessSizeLog);
|
||
|
|
MemoryAccessImpl(thr, addr, kAccessSizeLog, is_write, false, shadow_mem,
|
||
|
|
cur);
|
||
|
|
shadow_mem += kShadowCnt;
|
||
|
|
}
|
||
|
|
// Handle ending, if any.
|
||
|
|
for (; size; addr++, size--) {
|
||
|
|
int const kAccessSizeLog = 0;
|
||
|
|
Shadow cur(fast_state);
|
||
|
|
cur.SetWrite(is_write);
|
||
|
|
cur.SetAddr0AndSizeLog(addr & (kShadowCell - 1), kAccessSizeLog);
|
||
|
|
MemoryAccessImpl(thr, addr, kAccessSizeLog, is_write, false, shadow_mem,
|
||
|
|
cur);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
} // namespace __tsan
|
||
|
|
|
||
|
|
#if !SANITIZER_GO
|
||
|
|
// Must be included in this file to make sure everything is inlined.
|
||
|
|
# include "tsan_interface.inc"
|
||
|
|
#endif
|