Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/m32r/unlock.cgs

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2023-03-06 14:48:14 +01:00
# m32r testcase for unlock $src1,@$src2
# mach(): m32r m32rx
.include "testutils.inc"
start
.global unlock
unlock:
mvaddr_h_gr r4, data_loc
mvi_h_gr r5, 1
lock r5, @r4
mvi_h_gr r5, 2
unlock r5, @r4
ld r6, @r4
test_h_gr r6, 2
mvi_h_gr r5, 0
unlock r5, @r4 ; This should be a nop since the processor should be unlocked.
ld r6, @r4
test_h_gr r6, 2
pass
data_loc:
.word 0