Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/m32r/subv.cgs

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2023-03-06 14:48:14 +01:00
# m32r testcase for subv $dr,$sr
# mach(): m32r m32rx
.include "testutils.inc"
start
.global subv
subv:
mvi_h_condbit 0
mvi_h_gr r4, 0x80000000
mvi_h_gr r5, 3
subv r4, r5
bc ok
fail
ok:
pass