Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/m32r/sra3.cgs

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2023-03-06 14:48:14 +01:00
# m32r testcase for sra3 $dr,$sr,#$simm16
# mach(): m32r m32rx
.include "testutils.inc"
start
.global sra3
sra3:
mvi_h_gr r4, 0
mvi_h_gr r5, 0xf0f0f0ff
sra3 r4, r5, #4
test_h_gr r4, 0xff0f0f0f
pass