Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/m32r/and3.cgs

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2023-03-06 14:48:14 +01:00
# m32r testcase for and3 $dr,$sr,#$uimm16
# mach(): m32r m32rx
.include "testutils.inc"
start
.global and3
and3:
mvi_h_gr r4, 0
mvi_h_gr r5, 6
and3 r4, r5, #3
test_h_gr r4, 2
pass