81 lines
1.5 KiB
ArmAsm
81 lines
1.5 KiB
ArmAsm
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# Hitachi H8 testcase 'tas'
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# mach(): h8300s h8sx
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# as(h8300): --defsym sim_cpu=0
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# as(h8300h): --defsym sim_cpu=1
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# as(h8300s): --defsym sim_cpu=2
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# as(h8sx): --defsym sim_cpu=3
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# ld(h8300h): -m h8300helf
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# ld(h8300s): -m h8300self
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# ld(h8sx): -m h8300sxelf
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.include "testutils.inc"
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.data
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byte_dst: .byte 0
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start
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tas_ind: ; test and set instruction
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set_grs_a5a5
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mov #byte_dst, er4
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set_ccr_zero
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;; tas @erd
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tas @er4 ; should set zero flag
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test_carry_clear
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test_neg_clear
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test_ovf_clear
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test_zero_set
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tas @er4 ; should clear zero, set neg
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test_carry_clear
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test_neg_set
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test_ovf_clear
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test_zero_clear
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test_gr_a5a5 0 ; general regs have not been modified
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test_gr_a5a5 1
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test_gr_a5a5 2
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test_gr_a5a5 3
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test_h_gr32 byte_dst, er4
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test_gr_a5a5 5
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test_gr_a5a5 6
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test_gr_a5a5 7
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mov.b @byte_dst, r0l ; test variable has MSB set?
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test_h_gr8 0x80 r0l
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.if (sim_cpu == h8sx) ; h8sx can use any register for tas
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tas_h8sx: ; test and set instruction
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mov.b #0, @byte_dst
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set_grs_a5a5
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mov #byte_dst, er3
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set_ccr_zero
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;; tas @erd
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tas @er3 ; should set zero flag
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test_carry_clear
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test_neg_clear
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test_ovf_clear
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test_zero_set
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tas @er3 ; should clear zero, set neg
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test_carry_clear
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test_neg_set
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test_ovf_clear
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test_zero_clear
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test_gr_a5a5 0 ; general regs have not been modified
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test_gr_a5a5 1
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test_gr_a5a5 2
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test_h_gr32 byte_dst, er3
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test_gr_a5a5 4
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test_gr_a5a5 5
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test_gr_a5a5 6
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test_gr_a5a5 7
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mov.b @byte_dst, r0l ; test variable has MSB set?
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test_h_gr8 0x80 r0l
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.endif ; h8sx
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pass
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exit 0
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