254 lines
6.2 KiB
Text
254 lines
6.2 KiB
Text
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/* FR30 opcode support. -*- C -*-
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Copyright 2011 Free Software Foundation, Inc.
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Contributed by Red Hat Inc;
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This file is part of the GNU Binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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/* This file is an addendum to fr30.cpu. Heavy use of C code isn't
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appropriate in .cpu files, so it resides here. This especially applies
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to assembly/disassembly where parsing/printing can be quite involved.
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Such things aren't really part of the specification of the cpu, per se,
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so .cpu files provide the general framework and .opc files handle the
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nitty-gritty details as necessary.
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Each section is delimited with start and end markers.
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<arch>-opc.h additions use: "-- opc.h"
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<arch>-opc.c additions use: "-- opc.c"
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<arch>-asm.c additions use: "-- asm.c"
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<arch>-dis.c additions use: "-- dis.c"
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<arch>-ibd.h additions use: "-- ibd.h". */
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/* -- opc.h */
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/* ??? This can be improved upon. */
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#undef CGEN_DIS_HASH_SIZE
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#define CGEN_DIS_HASH_SIZE 16
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#undef CGEN_DIS_HASH
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#define CGEN_DIS_HASH(buffer, value) (((unsigned char *) (buffer))[0] >> 4)
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/* -- */
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/* -- asm.c */
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/* Handle register lists for LDMx and STMx. */
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static int
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parse_register_number (const char **strp)
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{
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int regno;
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if (**strp < '0' || **strp > '9')
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return -1; /* Error. */
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regno = **strp - '0';
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++*strp;
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if (**strp >= '0' && **strp <= '9')
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{
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regno = regno * 10 + (**strp - '0');
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++*strp;
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}
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return regno;
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}
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static const char *
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parse_register_list (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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const char **strp,
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int opindex ATTRIBUTE_UNUSED,
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unsigned long *valuep,
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int high_low, /* 0 == high, 1 == low. */
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int load_store) /* 0 == load, 1 == store. */
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{
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*valuep = 0;
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while (**strp && **strp != ')')
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{
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int regno;
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if (**strp != 'R' && **strp != 'r')
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break;
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++*strp;
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regno = parse_register_number (strp);
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if (regno == -1)
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return _("Register number is not valid");
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if (regno > 7 && !high_low)
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return _("Register must be between r0 and r7");
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if (regno < 8 && high_low)
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return _("Register must be between r8 and r15");
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if (high_low)
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regno -= 8;
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if (load_store) /* Mask is reversed for store. */
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*valuep |= 0x80 >> regno;
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else
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*valuep |= 1 << regno;
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if (**strp == ',')
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{
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if (*(*strp + 1) == ')')
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break;
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++*strp;
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}
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}
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if (!*strp || **strp != ')')
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return _("Register list is not valid");
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return NULL;
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}
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static const char *
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parse_low_register_list_ld (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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return parse_register_list (cd, strp, opindex, valuep,
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0 /* Low. */, 0 /* Load. */);
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}
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static const char *
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parse_hi_register_list_ld (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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return parse_register_list (cd, strp, opindex, valuep,
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1 /* High. */, 0 /* Load. */);
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}
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static const char *
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parse_low_register_list_st (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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return parse_register_list (cd, strp, opindex, valuep,
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0 /* Low. */, 1 /* Store. */);
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}
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static const char *
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parse_hi_register_list_st (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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return parse_register_list (cd, strp, opindex, valuep,
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1 /* High. */, 1 /* Store. */);
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}
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/* -- */
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/* -- dis.c */
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static void
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print_register_list (void * dis_info,
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long value,
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long offset,
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int load_store) /* 0 == load, 1 == store. */
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{
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disassemble_info *info = dis_info;
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int mask;
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int reg_index = 0;
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char * comma = "";
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if (load_store)
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mask = 0x80;
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else
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mask = 1;
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if (value & mask)
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{
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(*info->fprintf_func) (info->stream, "r%li", reg_index + offset);
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comma = ",";
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}
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for (reg_index = 1; reg_index <= 7; ++reg_index)
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{
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if (load_store)
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mask >>= 1;
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else
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mask <<= 1;
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if (value & mask)
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{
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(*info->fprintf_func) (info->stream, "%sr%li", comma, reg_index + offset);
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comma = ",";
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}
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}
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}
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static void
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print_hi_register_list_ld (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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void * dis_info,
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long value,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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{
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print_register_list (dis_info, value, 8, 0 /* Load. */);
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}
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static void
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print_low_register_list_ld (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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void * dis_info,
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long value,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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{
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print_register_list (dis_info, value, 0, 0 /* Load. */);
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}
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static void
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print_hi_register_list_st (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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void * dis_info,
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long value,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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{
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print_register_list (dis_info, value, 8, 1 /* Store. */);
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}
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static void
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print_low_register_list_st (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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void * dis_info,
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long value,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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{
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print_register_list (dis_info, value, 0, 1 /* Store. */);
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}
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static void
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print_m4 (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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void * dis_info,
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long value,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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{
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disassemble_info *info = (disassemble_info *) dis_info;
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(*info->fprintf_func) (info->stream, "%ld", value);
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}
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/* -- */
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