Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/v850/divq.cgs

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2023-03-06 14:48:14 +01:00
# v850 bins
# mach: v850e3v5
# as: -mv850e3v5
.include "testutils.inc"
seti 0xfffffffb r11
seti 0x32 r10
divq r11, r10, r11
reg r10, 0xfffffff6
reg r11, 0x0
pass