75 lines
2.6 KiB
ArmAsm
75 lines
2.6 KiB
ArmAsm
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/* Copyright 2021-2022 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This testcase contains a function where the 'ld', 'c.ld', 'lw' or 'c.lw'
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instruction is used in the prologue before the RA register have been saved
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on the stack.
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This mimics a pattern observed in the __pthread_clockjoin_ex function
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in libpthread.so.0 (from glibc-2.33-0ubuntu5) where a canary value is
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loaded and placed on the stack in order to detect stack smashing.
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The skeleton for this file was generated using the following command:
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gcc -x c -S -c -o - - <<EOT
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static long int __canary = 42;
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extern int bar ();
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int foo () { return bar(); }
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EOT
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The result of this command is modified in the following way:
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- The prologue is adapted to reserve 16 more bytes on the stack.
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- A part that simulates the installation of a canary on the stack is
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added. The canary is loaded multiple times to simulate the use of
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various instructions that could do the work (ld or c.ld for a 64 bit
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canary, lw or c.lw for a 32 bit canary).
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- The epilogue is adjusted to be able to return properly. The epilogue
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does not check the canary value since this testcase is only interested
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in ensuring GDB can scan the prologue. */
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.option pic
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.text
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.data
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.align 3
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.type __canary, @object
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.size __canary, 8
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__canary:
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.dword 42
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.text
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.align 1
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.globl foo
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.type foo, @function
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foo:
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addi sp,sp,-32
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lla a5,__canary # Load the fake canary address.
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lw t4,0(a5) # Load a 32 bit canary (use t4 to force the use of
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# the non compressed instruction).
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ld t4,0(a5) # Load a 64 bit canary (use t4 to force the use of
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# the non compressed instruction).
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c.lw a4,0(a5) # Load a 32 bit canary using the compressed insn.
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c.ld a4,0(a5) # Load a 64 bit canary using the compressed insn.
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sd a4,0(sp) # Place the fake canary on the stack.
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sd ra,16(sp)
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sd s0,8(sp)
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addi s0,sp,32
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call bar@plt
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mv a5,a0
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mv a0,a5
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ld ra,16(sp)
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ld s0,8(sp)
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addi sp,sp,32
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jr ra
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.size foo, .-foo
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