90 lines
1.6 KiB
Text
90 lines
1.6 KiB
Text
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# Intel(r) Wireless MMX(tm) technology testcase for TMIAxy
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# mach: xscale
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# as: -mcpu=xscale+iwmmxt
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.include "testutils.inc"
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start
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.global tmiaXY
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tmiaXY:
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# Enable access to CoProcessors 0 & 1 before
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# we attempt these instructions.
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mvi_h_gr r1, 3
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mcr p15, 0, r1, cr15, cr1, 0
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# Test Bottom Bottom Multilply Accumulate
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mvi_h_gr r0, 0x11223344
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mvi_h_gr r1, 0x55667788
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mvi_h_gr r2, 0x12345678
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mvi_h_gr r3, 0x9abcdef0
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tmcrr wr0, r0, r1
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tmiaBB wr0, r2, r3
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x05f753c4
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test_h_gr r1, 0x55667788
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test_h_gr r2, 0x12345678
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test_h_gr r3, 0x9abcdef0
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# Test Bottom Top Multilply Accumulate
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mvi_h_gr r0, 0x11223344
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mvi_h_gr r1, 0x55667788
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mvi_h_gr r2, 0x12345678
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mvi_h_gr r3, 0x9abcdef0
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tmcrr wr0, r0, r1
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tmiaBT wr0, r2, r3
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tmrrc r0, r1, wr0
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test_h_gr r0, 0xeeede364
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test_h_gr r1, 0x55667787
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test_h_gr r2, 0x12345678
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test_h_gr r3, 0x9abcdef0
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# Test Top Bottom Multilply Accumulate
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mvi_h_gr r0, 0x11223344
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mvi_h_gr r1, 0x55667788
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mvi_h_gr r2, 0x12345678
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mvi_h_gr r3, 0x9abcdef0
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tmcrr wr0, r0, r1
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tmiaTB wr0, r2, r3
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x0ec85c04
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test_h_gr r1, 0x55667788
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test_h_gr r2, 0x12345678
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test_h_gr r3, 0x9abcdef0
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# Test Top Top Multilply Accumulate
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mvi_h_gr r0, 0x11223344
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mvi_h_gr r1, 0x55667788
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mvi_h_gr r2, 0x12345678
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mvi_h_gr r3, 0x9abcdef0
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tmcrr wr0, r0, r1
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tmiaTT wr0, r2, r3
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tmrrc r0, r1, wr0
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test_h_gr r0, 0x09eed974
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test_h_gr r1, 0x55667788
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test_h_gr r2, 0x12345678
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test_h_gr r3, 0x9abcdef0
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pass
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