593 lines
16 KiB
Text
593 lines
16 KiB
Text
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# Makefile fragment for common parts of all simulators.
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# Copyright 1997-2022 Free Software Foundation, Inc.
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# Contributed by Cygnus Support.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# This Makefile fragment consists of two separate parts.
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# They are merged into the final Makefile at points denoted by
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# "## COMMON_PRE_CONFIG_FRAG" and "## COMMON_POST_CONFIG_FRAG".
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#
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# The target Makefile should look like:
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#
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#># Copyright blah blah
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#>
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#>## COMMON_PRE_CONFIG_FRAG
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#>
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#># Any overrides necessary for the SIM_FOO config vars.
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#>SIM_FOO = ...
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#>
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#>## COMMON_POST_CONFIG_FRAG
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#>
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#># Rules to build target specific .o's.
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## COMMON_PRE_CONFIG_FRAG
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srcdir = /home/seti/riscv-gnu-toolchain/gdb/sim
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VPATH = $(srcdir):$(srccom)
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srccom = $(srcdir)/../common
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srcroot = $(srcdir)/../..
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srcsim = $(srcdir)/..
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#config.status = config.status
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config.status = ../config.status
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include $(srcroot)/gdb/silent-rules.mk
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ifeq ($(V),0)
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ECHO_STAMP = @echo " GEN "
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ECHO_IGEN = @echo " IGEN $(<F)";
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else
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ECHO_STAMP = @:
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endif
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# Helper code from gnulib.
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GNULIB_PARENT_DIR = ../..
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include $(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc
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# Settings from top-level configure.
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include ../arch-subdir.mk
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prefix = /opt/riscv
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exec_prefix = ${prefix}
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bindir = ${exec_prefix}/bin
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libdir = ${exec_prefix}/lib
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tooldir = $(libdir)/$(target_alias)
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datadir = ${datarootdir}
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datarootdir = ${prefix}/share
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mandir = ${datarootdir}/man
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man1dir = $(mandir)/man1
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infodir = ${datarootdir}/info
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includedir = ${prefix}/include
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# This can be referenced by the gettext configuration code.
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top_builddir = ..
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SHELL = /bin/bash
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SIM_BITSIZE =
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SIM_FLOAT =
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SIM_WARN_CFLAGS = $(WARN_CFLAGS)
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SIM_WERROR_CFLAGS = $(WERROR_CFLAGS)
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# Dependency tracking information.
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depcomp = $(SHELL) $(srcroot)/depcomp
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# Note that these are overridden by GNU make-specific code below if
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# GNU make is used. The overrides implement dependency tracking.
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COMPILE.pre = $(CC) $(C_DIALECT)
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COMPILE.post = -c -o $@
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COMPILE = $(ECHO_CC) $(COMPILE.pre) $(ALL_CFLAGS) $(COMPILE.post)
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POSTCOMPILE = @true
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# igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
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# leak detection while running it.
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IGEN = ../igen/igen$(EXEEXT)
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IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN)
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# Each simulator's Makefile.in defines one or more of these variables
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# to override our settings as necessary. There is no need to define these
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# in the simulator's Makefile.in if one is using the default value. In fact
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# it's preferable not to.
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# List of object files, less common parts.
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SIM_OBJS =
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# List of extra dependencies.
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# Generally this consists of simulator specific files included by sim-main.h.
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SIM_EXTRA_DEPS =
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# List of flags to always pass to $(CC).
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SIM_EXTRA_CFLAGS =
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# List of extra libraries to link with.
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SIM_EXTRA_LIBS =
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# List of main object files for `run'.
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SIM_RUN_OBJS = nrun.o
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# Dependency of `install' to install any extra files.
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SIM_EXTRA_INSTALL =
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# Dependency of `clean' to clean any extra files.
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SIM_EXTRA_CLEAN =
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# Likewise `distclean'
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SIM_EXTRA_DISTCLEAN =
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# Every time a new general purpose source file was added every target's
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# Makefile.in needed to be updated to include the file in SIM_OBJS.
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# This doesn't scale.
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# This variable specifies all the generic stuff common to the newer simulators.
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# Things like sim-reason.o can't go here as the cpu may provide its own
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# (though hopefully in time that won't be so). Things like sim-bits.o can go
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# here. Some files are used by all simulators (e.g. callback.o).
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# Those files are specified in LIB_OBJS below.
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SIM_COMMON_HW_OBJS = \
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hw-alloc.o \
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hw-base.o \
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hw-device.o \
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hw-events.o \
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hw-handles.o \
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hw-instances.o \
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hw-ports.o \
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hw-properties.o \
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hw-tree.o \
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sim-hw.o \
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SIM_NEW_COMMON_OBJS = \
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sim-arange.o \
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sim-bits.o \
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sim-close.o \
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sim-command.o \
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sim-config.o \
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sim-core.o \
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sim-cpu.o \
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sim-endian.o \
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sim-engine.o \
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sim-events.o \
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sim-fpu.o \
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sim-hload.o \
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sim-hrw.o \
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sim-io.o \
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sim-info.o \
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sim-memopt.o \
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sim-model.o \
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sim-module.o \
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sim-options.o \
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sim-profile.o \
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sim-reason.o \
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sim-reg.o \
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sim-signal.o \
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sim-stop.o \
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sim-syscall.o \
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sim-trace.o \
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sim-utils.o \
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sim-watch.o \
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\
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$(SIM_HW_OBJS) \
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# cgen-sim.h and the headers it includes
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CGEN_SIM_DEPS = \
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$(srccom)/cgen-sim.h \
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$(srccom)/cgen-defs.h \
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$(srccom)/cgen-scache.h \
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$(srccom)/cgen-fpu.h \
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$(srccom)/cgen-par.h \
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$(srccom)/cgen-cpu.h \
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$(srccom)/cgen-trace.h \
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cpuall.h
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# Add this to SIM_EXTRA_DEPS.
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CGEN_INCLUDE_DEPS = \
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$(CGEN_SIM_DEPS) \
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$(srccom)/cgen-engine.h \
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$(srccom)/cgen-types.h \
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$(srcdir)/../../include/opcode/cgen.h
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## End COMMON_PRE_CONFIG_FRAG
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## COMMON_POST_CONFIG_FRAG
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CONFIG_CFLAGS = \
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-DHAVE_CONFIG_H \
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$(SIM_BITSIZE) \
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$(SIM_FLOAT) \
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$(SIM_HW_CFLAGS) \
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$(SIM_INLINE) \
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$(SIM_WARN_CFLAGS) \
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$(SIM_WERROR_CFLAGS) \
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$(SIM_HARDWARE)
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CSEARCH = -I. -I$(srcdir) -I../common -I$(srccom) \
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-I../../include -I$(srcroot)/include \
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-I../../bfd -I$(srcroot)/bfd \
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-I../../opcodes -I$(srcroot)/opcodes \
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-I../.. \
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$(INTL_CFLAGS)
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ALL_CFLAGS = $(CONFIG_CFLAGS) $(CSEARCH) $(INCGNU) $(SIM_EXTRA_CFLAGS) $(CFLAGS)
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BUILD_CFLAGS = $(CFLAGS_FOR_BUILD) $(CSEARCH)
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COMMON_DEP_CFLAGS = $(CONFIG_CFLAGS) $(CSEARCH) $(SIM_EXTRA_CFLAGS)
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SIM_HW_DEVICES = cfi core pal glue $(SIM_EXTRA_HW_DEVICES)
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ZLIB = $(zlibdir) -lz
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LIBIBERTY_LIB = ../../libiberty/libiberty.a
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BFD_LIB = ../../bfd/libbfd.a
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OPCODES_LIB = ../../opcodes/libopcodes.a
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CONFIG_LIBS = $(COMMON_LIBS) -ldl -lm -lm -lnsl $(ZLIB)
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LIBDEPS = $(BFD_LIB) $(OPCODES_LIB) $(LIBINTL_DEP) $(LIBIBERTY_LIB)
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EXTRA_LIBS = $(BFD_LIB) $(OPCODES_LIB) $(LIBINTL) $(LIBIBERTY_LIB) \
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$(CONFIG_LIBS) $(SIM_EXTRA_LIBS) $(LIBDL) $(LIBGNU) $(LIBGNU_EXTRA_LIBS)
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COMMON_OBJS_NAMES = \
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callback.o \
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portability.o \
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sim-load.o \
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syscall.o \
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target-newlib-errno.o \
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target-newlib-open.o \
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target-newlib-signal.o \
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target-newlib-syscall.o \
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version.o
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COMMON_OBJS = $(COMMON_OBJS_NAMES:%=../common/common_libcommon_a-%)
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LIB_OBJS = modules.o $(COMMON_OBJS) $(SIM_OBJS)
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COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(BUILD_CFLAGS)
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LINK_FOR_BUILD = $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(LDFLAGS_FOR_BUILD) -o $@
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RUNTESTFLAGS =
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callback_h = $(srcroot)/include/sim/callback.h
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remote_sim_h = $(srcroot)/include/sim/sim.h
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all: libsim.a run$(EXEEXT)
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libsim.a: $(LIB_OBJS)
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$(SILENCE) rm -f libsim.a
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$(ECHO_AR) $(AR) $(AR_FLAGS) libsim.a $(LIB_OBJS)
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$(ECHO_RANLIB) $(RANLIB) libsim.a
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run$(EXEEXT): $(SIM_RUN_OBJS) libsim.a $(LIBDEPS)
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$(ECHO_CCLD) $(CC) $(ALL_CFLAGS) $(LDFLAGS) -o run$(EXEEXT) \
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$(SIM_RUN_OBJS) libsim.a $(EXTRA_LIBS)
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#
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# Rules for building sim-* components. Triggered by listing the corresponding
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# .o file in the list of simulator targets.
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#
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sim_main_headers = \
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sim-main.h \
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$(sim-assert_h) \
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$(sim-base_h) \
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$(sim-cpu_h) \
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$(sim-engine_h) \
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$(sim-events_h) \
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$(sim-memopt_h) \
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$(sim-model_h) \
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$(sim-module_h) \
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$(sim-profile_h) \
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$(sim-trace_h) \
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$(sim-watch_h) \
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$(sim-basics_h) \
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$(SIM_EXTRA_DEPS)
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# Exported version of sim_main_headers.
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SIM_MAIN_DEPS = \
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$(sim_main_headers)
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sim-alu_h = $(srccom)/sim-alu.h
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sim-arange_h = $(srccom)/sim-arange.h
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sim-assert_h = $(srccom)/sim-assert.h
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sim-base_h = $(srccom)/sim-base.h \
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$(sim-module_h) \
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$(sim-trace_h) \
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$(sim-core_h) \
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$(sim-events_h) \
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$(sim-profile_h) \
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$(sim-model_h) \
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$(sim-io_h) \
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$(sim-engine_h) \
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$(sim-watch_h) \
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$(sim-memopt_h) \
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$(sim-cpu_h)
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sim-basics_h = $(srccom)/sim-basics.h \
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$(sim-config_h) \
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$(callback_h) \
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$(sim-inline_h) \
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$(sim-types_h) \
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$(sim-bits_h) \
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$(sim-endian_h) \
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$(sim-signal_h) \
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$(sim-arange_h) \
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$(sim-utils_h)
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sim-bits_h = $(srccom)/sim-bits.h \
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$(srccom)/sim-bits.c
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sim-config_h = $(srccom)/sim-config.h
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sim-core_h = $(srccom)/sim-core.h
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sim-cpu_h = $(srccom)/sim-cpu.h
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sim-endian_h = $(srccom)/sim-endian.h \
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$(srccom)/sim-endian.c
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sim-engine_h = $(srccom)/sim-engine.h
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sim-events_h = $(srccom)/sim-events.h
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sim-fpu_h = $(srccom)/sim-fpu.h
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sim-hw_h = $(srccom)/sim-hw.h
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sim-inline_h = $(srccom)/sim-inline.h
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sim-io_h = $(srccom)/sim-io.h
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sim-memopt_h = $(srccom)/sim-memopt.h
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sim-model_h = $(srccom)/sim-model.h
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sim-module_h = $(srccom)/sim-module.h
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sim-n-bits_h = $(srccom)/sim-n-bits.h
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sim-n-core_h = $(srccom)/sim-n-core.h
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sim-n-endian_h = $(srccom)/sim-n-endian.h
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sim-options_h = $(srccom)/sim-options.h
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sim-profile_h = $(srccom)/sim-profile.h
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sim-signal_h = $(srccom)/sim-signal.h
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sim-trace_h = $(srccom)/sim-trace.h
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sim-types_h = $(srccom)/sim-types.h
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sim-utils_h = $(srccom)/sim-utils.h
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sim-watch_h = $(srccom)/sim-watch.h
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hw-alloc_h = $(srccom)/hw-alloc.h
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hw-base_h = $(srccom)/hw-base.h
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hw-device_h = $(srccom)/hw-device.h
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hw-events_h = $(srccom)/hw-events.h
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hw-handles_h = $(srccom)/hw-handles.h
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hw-instances_h = $(srccom)/hw-instances.h
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hw-ports_h = $(srccom)/hw-ports.h
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hw-properties_h = $(srccom)/hw-properties.h
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hw-tree_h = $(srccom)/hw-tree.h
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hw_main_headers = \
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$(srccom)/hw-main.h \
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$(hw-alloc_h) \
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$(hw-base_h) \
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$(hw-device_h) \
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$(hw-events_h) \
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$(hw-instances_h) \
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$(hw-handles_h) \
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$(hw-ports_h) \
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$(hw-properties_h) \
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#
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# Dependency tracking. Most of this is conditional on GNU Make being
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# found by configure; if GNU Make is not found, we fall back to a
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# simpler scheme.
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#
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ifeq ($(DEPMODE),depmode=gcc3)
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# Note that we put the dependencies into a .Tpo file, then move them
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# into place if the compile succeeds. We need this because gcc does
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# not atomically write the dependency output file.
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override COMPILE.post = -c -o $@ -MT $@ -MMD -MP \
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-MF $(DEPDIR)/$(basename $(@F)).Tpo
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override POSTCOMPILE = @mv $(DEPDIR)/$(basename $(@F)).Tpo \
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$(DEPDIR)/$(basename $(@F)).Po
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else
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override COMPILE.pre = source='$<' object='$@' libtool=no \
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DEPDIR=$(DEPDIR) $(DEPMODE) $(depcomp) $(CC)
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# depcomp handles atomicity for us, so we don't need a postcompile
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# step.
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override POSTCOMPILE =
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endif
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all_object_files = $(LIB_OBJS) $(SIM_RUN_OBJS)
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generated_files = \
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$(SIM_EXTRA_DEPS) \
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hw-config.h \
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modules.c
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# Ensure that generated files are created early. Use order-only
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# dependencies if available. They require GNU make 3.80 or newer,
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# and the .VARIABLES variable was introduced at the same time.
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ifdef .VARIABLES
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$(all_object_files): | $(generated_files)
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else
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$(all_object_files) : $(generated_files)
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endif
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# Dependencies.
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||
|
-include $(patsubst %.o, $(DEPDIR)/%.Po, $(all_object_files))
|
||
|
|
||
|
# FIXME This is one very simple-minded way of generating the file hw-config.h
|
||
|
hw-config.h: stamp-hw ; @true
|
||
|
stamp-hw: Makefile.in $(srccom)/Make-common.in $(config.status) Makefile
|
||
|
$(ECHO_STAMP) hw-config.h
|
||
|
$(SILENCE) ( \
|
||
|
sim_hw="$(SIM_HW_DEVICES)" ; \
|
||
|
echo "/* generated by Makefile */" ; \
|
||
|
printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
|
||
|
echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
|
||
|
printf " dv_%s_descriptor,\n" $$sim_hw ; \
|
||
|
echo " NULL," ; \
|
||
|
echo "};" \
|
||
|
) > tmp-hw.h
|
||
|
$(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-hw.h hw-config.h
|
||
|
$(SILENCE) touch $@
|
||
|
|
||
|
test-hw-events: $(srccom)/hw-events.c libsim.a
|
||
|
$(CC) $(ALL_CFLAGS) -DMAIN -o test-hw-events$(EXEEXT) \
|
||
|
$(srccom)/hw-events.c libsim.a $(EXTRA_LIBS)
|
||
|
|
||
|
# See sim_pre_argv_init and sim_module_install in sim-module.c for more details.
|
||
|
modules.c: stamp-modules ; @true
|
||
|
stamp-modules: Makefile $(SIM_OBJS:.o=.c)
|
||
|
$(ECHO_STAMP) modules.c
|
||
|
$(SILENCE) LANG=C ; export LANG ; \
|
||
|
LC_ALL=C ; export LC_ALL ; \
|
||
|
sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $^ | sort >$@.l-tmp
|
||
|
@set -e; (\
|
||
|
echo '/* Do not modify this file. */'; \
|
||
|
echo '/* It is created automatically by the Makefile. */'; \
|
||
|
echo '#include "libiberty.h"'; \
|
||
|
echo '#include "sim-module.h"'; \
|
||
|
sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
|
||
|
echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
|
||
|
sed -e 's:\(.*\): \1,:' $@.l-tmp; \
|
||
|
echo '};'; \
|
||
|
echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
|
||
|
) >$@.tmp
|
||
|
$(SILENCE) $(SHELL) $(srcroot)/move-if-change $@.tmp modules.c
|
||
|
$(SILENCE) rm -f $@.l-tmp $@.tmp
|
||
|
$(SILENCE) touch $@
|
||
|
|
||
|
# CGEN support.
|
||
|
|
||
|
# For use in Makefile.in for cpu-specific files.
|
||
|
CGEN_MAIN_CPU_DEPS = \
|
||
|
$(SIM_MAIN_DEPS) \
|
||
|
$(srccom)/cgen-ops.h \
|
||
|
$(srccom)/cgen-mem.h
|
||
|
|
||
|
# Support targets.
|
||
|
|
||
|
install: install-common $(SIM_EXTRA_INSTALL)
|
||
|
|
||
|
install-common: installdirs
|
||
|
a=`basename "$$(pwd)"`; \
|
||
|
n=`echo run | sed '$(program_transform_name)'`; \
|
||
|
[ "$(SIM_PRIMARY_TARGET)" = "$$a" ] || n="$$n-$$a"; \
|
||
|
$(INSTALL_PROGRAM) run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
|
||
|
n=`echo sim | sed '$(program_transform_name)'`; \
|
||
|
a=`basename "$$(pwd)"`; \
|
||
|
[ "$(SIM_PRIMARY_TARGET)" = "$$a" ] || n="$$n-$$a"; \
|
||
|
n="lib$$n.a"; \
|
||
|
$(INSTALL_DATA) libsim.a $(DESTDIR)$(libdir)/$$n ; \
|
||
|
( cd $(DESTDIR)$(libdir) ; $(RANLIB) $$n )
|
||
|
|
||
|
installdirs:
|
||
|
$(SHELL) $(srcdir)/../../mkinstalldirs $(DESTDIR)$(bindir)
|
||
|
$(SHELL) $(srcdir)/../../mkinstalldirs $(DESTDIR)$(libdir)
|
||
|
|
||
|
check:
|
||
|
|
||
|
html:
|
||
|
clean-html:
|
||
|
install-html:
|
||
|
|
||
|
info:
|
||
|
clean-info:
|
||
|
install-info:
|
||
|
|
||
|
pdf:
|
||
|
clean-pdf:
|
||
|
install-pdf:
|
||
|
|
||
|
.NOEXPORT:
|
||
|
MAKEOVERRIDES=
|
||
|
|
||
|
tags etags: TAGS
|
||
|
|
||
|
# Macros like EXTERN_SIM_CORE confuse tags.
|
||
|
# And the sim-n-foo.h files create functions that can't be found either.
|
||
|
TAGS: force
|
||
|
cd $(srcdir) && \
|
||
|
etags --regex '/^\([[:lower:]_]+\) (/\1/' --regex '/^\/[*] TAGS: .*/' \
|
||
|
*.[ch] ../common/*.[ch]
|
||
|
|
||
|
mostlyclean clean: $(SIM_EXTRA_CLEAN)
|
||
|
rm -f *.[oa] *~ core \
|
||
|
run$(EXEEXT) libsim.a \
|
||
|
hw-config.h stamp-hw \
|
||
|
modules.c stamp-modules \
|
||
|
tmp-mloop.hin tmp-mloop.h tmp-mloop.cin tmp-mloop.c
|
||
|
|
||
|
distclean maintainer-clean realclean: clean $(SIM_EXTRA_DISTCLEAN)
|
||
|
rm -f TAGS
|
||
|
rm -f Makefile config.cache config.log config.status
|
||
|
|
||
|
.c.o:
|
||
|
$(COMPILE) $<
|
||
|
$(POSTCOMPILE)
|
||
|
|
||
|
# Dummy target to force execution of dependent targets.
|
||
|
force:
|
||
|
|
||
|
Makefile: Makefile.in $(srccom)/Make-common.in $(config.status)
|
||
|
# $(ECHO_GEN) CONFIG_HEADERS= $(SHELL) ./config.status
|
||
|
$(ECHO_GEN) pwd=`pwd` && subdir=`basename "$$pwd"` && cd .. && \
|
||
|
$(SHELL) ./config.status Make-common.sim $$subdir/Makefile.sim $$subdir/Makefile
|
||
|
|
||
|
#config.status: configure
|
||
|
# $(ECHO_GEN) $(SHELL) ./config.status --recheck
|
||
|
|
||
|
|
||
|
# CGEN support
|
||
|
|
||
|
GUILE = `if [ -f ../../guile/libguile/guile ]; then echo ../../guile/libguile/guile; else echo guile ; fi`
|
||
|
CGEN = "$(GUILE) -l $(CGENDIR)/guile.scm -s"
|
||
|
CGENFLAGS = -v
|
||
|
CGEN_CPU_DIR = $(CGENDIR)/cpu
|
||
|
|
||
|
# Most ports use the files here instead of cgen/cpu.
|
||
|
CPU_DIR = $(srcroot)/cpu
|
||
|
|
||
|
CGEN_READ_SCM = $(CGENDIR)/sim.scm
|
||
|
CGEN_ARCH_SCM = $(CGENDIR)/sim-arch.scm
|
||
|
CGEN_CPU_SCM = $(CGENDIR)/sim-cpu.scm $(CGENDIR)/sim-model.scm
|
||
|
CGEN_DECODE_SCM = $(CGENDIR)/sim-decode.scm
|
||
|
CGEN_DESC_SCM = $(CGENDIR)/desc.scm $(CGENDIR)/desc-cpu.scm
|
||
|
|
||
|
# Various choices for which cpu specific files to generate.
|
||
|
# These are passed to cgen.sh in the "extrafiles" argument.
|
||
|
CGEN_CPU_EXTR = /extr/
|
||
|
CGEN_CPU_READ = /read/
|
||
|
CGEN_CPU_WRITE = /write/
|
||
|
CGEN_CPU_SEM = /sem/
|
||
|
CGEN_CPU_SEMSW = /semsw/
|
||
|
|
||
|
CGEN_FLAGS_TO_PASS = \
|
||
|
CGEN='$(CGEN)' \
|
||
|
CGENFLAGS="$(CGENFLAGS)"
|
||
|
|
||
|
# We store the generated files in the source directory until we decide to
|
||
|
# ship a Scheme interpreter with gdb/binutils. Maybe we never will.
|
||
|
|
||
|
cgen-arch: force
|
||
|
$(SHELL) $(srccom)/cgen.sh arch $(srcdir) \
|
||
|
$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
|
||
|
$(arch) "$(FLAGS)" ignored "$(isa)" $(mach) ignored \
|
||
|
$(archfile) ignored
|
||
|
|
||
|
cgen-cpu: force
|
||
|
$(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \
|
||
|
$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
|
||
|
$(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
|
||
|
$(archfile) "$(EXTRAFILES)"
|
||
|
|
||
|
cgen-defs: force
|
||
|
$(SHELL) $(srccom)/cgen.sh defs $(srcdir) \
|
||
|
$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
|
||
|
$(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
|
||
|
$(archfile) ignored
|
||
|
|
||
|
cgen-decode: force
|
||
|
$(SHELL) $(srccom)/cgen.sh decode $(srcdir) \
|
||
|
$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
|
||
|
$(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
|
||
|
$(archfile) "$(EXTRAFILES)"
|
||
|
|
||
|
cgen-cpu-decode: force
|
||
|
$(SHELL) $(srccom)/cgen.sh cpu-decode $(srcdir) \
|
||
|
$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
|
||
|
$(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
|
||
|
$(archfile) "$(EXTRAFILES)"
|
||
|
|
||
|
cgen-desc: force
|
||
|
$(SHELL) $(srccom)/cgen.sh desc $(srcdir) \
|
||
|
$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
|
||
|
$(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" \
|
||
|
$(archfile) ignored $(opcfile)
|
||
|
|
||
|
## End COMMON_POST_CONFIG_FRAG
|