Projet_SETI_RISC-V/riscv-gnu-toolchain/binutils/sim/testsuite/arm/msr.cgs

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2023-03-06 14:48:14 +01:00
# arm testcase for msr$cond cpsr,$rm
# mach: unfinished
.include "testutils.inc"
start
.global msr_c
msr_c:
msr0 cpsr,pc
pass
# arm testcase for msr$cond spsr,$rm
# mach: unfinished
.include "testutils.inc"
start
.global msr_s
msr_s:
msr0 spsr,pc
pass