Model { Name "Grue_NL" Version 7.4 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.109" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "ISO-8859-1" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" MaxMDLFileLineLength 120 Created "Fri Mar 23 18:37:01 2012" Creator "abbasturki" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "abbasturki" ModifiedDateFormat "%" LastModifiedDate "Thu Mar 24 19:22:21 2016" RTWModifiedTimeStamp 380748139 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.6.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 2 Version "1.6.0" StartTime "0.0" StopTime "dt" AbsTol "auto" FixedStep "1e-4" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "ode45" SolverName "ode45" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 3 Version "1.6.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.6.0" Array { Type "Cell" Dimension 7 Cell "BooleansAsBitfields" Cell "PassReuseOutputArgsAs" Cell "PassReuseOutputArgsThreshold" Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off UseIntDivNetSlope off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off EnforceIntegerDowncast on ExpressionFolding on BooleansAsBitfields off EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero off NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off } Simulink.DebuggingCC { $ObjectID 5 Version "1.6.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" StrictBusMsg "Warning" LoggingUnavailableSignals "error" BlockIODiagnostic "none" } Simulink.HardwareCC { $ObjectID 6 Version "1.6.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.6.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.SFSimCC { $ObjectID 8 Version "1.6.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 9 Version "1.6.0" Array { Type "Cell" Dimension 6 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 10 Version "1.6.0" Array { Type "Cell" Dimension 19 Cell "IgnoreCustomStorageClasses" Cell "IgnoreTestpoints" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrFcnArg" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" Cell "ReqsInCode" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Version "1.6.0" Array { Type "Cell" Dimension 17 Cell "GeneratePreprocessorConditionals" Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition " [ 280, 124, 1160, 754 ] " } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "fixdt(1,16,0)" ConRadixGroup "Use specified scaling" OutScaling "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" LockScale off SampleTime "inf" FramePeriod "inf" } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchByCopyingInsideSignal off Interpolate on } Block { BlockType Integrator ExternalReset "none" InitialConditionSource "internal" InitialCondition "0" LimitOutput off UpperSaturationLimit "inf" LowerSaturationLimit "-inf" ShowSaturationPort off ShowStatePort off AbsoluteTolerance "auto" IgnoreLimit off ZeroCross on ContinuousStateAttributes "''" } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" SourceOfInitialOutputValue "Dialog" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Product Inputs "2" Multiplication "Element-wise(.*)" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Saturate UpperLimit "0.5" LowerLimit "-0.5" LinearizeAsGain on ZeroCross on SampleTime "-1" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Trigonometry Operator "sin" OutputSignalType "auto" SampleTime "-1" } } System { Name "Grue_NL" Location [0, 73, 1280, 796] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" ReportName "simulink-default.rpt" SIDHighWatermark 193 Block { BlockType SubSystem Name "Grue_NL" SID 19 Ports [2, 6] Position [570, 129, 700, 301] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Grue_NL" Location [57, 132, 1189, 742] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "F" SID 20 Position [25, 278, 55, 292] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "C + C0" SID 21 Position [25, 173, 55, 187] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant2" SID 192 Position [99, 95, 151, 120] BlockRotation 270 BlockMirror on NamePlacement "alternate" ShowName off Value "C0" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType SubSystem Name "Eq_Theta" SID 22 Ports [3, 3] Position [430, 55, 555, 115] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Eq_Theta" Location [447, 418, 1260, 809] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "d''" SID 23 Position [145, 58, 175, 72] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "r" SID 24 Position [435, 103, 465, 117] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "r'" SID 25 Position [145, 158, 175, 172] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Sum Name "Add" SID 26 Ports [3, 1] Position [435, 143, 475, 237] Inputs "---" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "Constant" SID 27 Position [65, 200, 95, 230] Value "2" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant1" SID 28 Position [65, 290, 95, 320] Value "g" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Product Name "Divide" SID 29 Ports [2, 1] Position [520, 167, 550, 198] Inputs "/*" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Integrator Name "Integrator" SID 30 Ports [1, 1] Position [585, 170, 615, 200] } Block { BlockType Integrator Name "Integrator1" SID 31 Ports [1, 1] Position [655, 170, 685, 200] } Block { BlockType Product Name "Product1" SID 32 Ports [2, 1] Position [320, 57, 350, 88] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product3" SID 33 Ports [3, 1] Position [255, 155, 285, 225] Inputs "3" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product4" SID 34 Ports [2, 1] Position [330, 252, 360, 283] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Trigonometry Name "Trigonometric\nFunction2" SID 35 Ports [1, 1] Position [255, 95, 285, 125] Operator "cos" } Block { BlockType Trigonometry Name "Trigonometric\nFunction3" SID 36 Ports [1, 1] Position [250, 245, 280, 275] } Block { BlockType Outport Name "Theta" SID 37 Position [755, 178, 785, 192] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "Theta'" SID 38 Position [655, 123, 685, 137] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "Theta''" SID 39 Position [585, 123, 615, 137] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Line { SrcBlock "d''" SrcPort 1 DstBlock "Product1" DstPort 1 } Line { SrcBlock "Trigonometric\nFunction2" SrcPort 1 Points [5, 0; 0, -30] DstBlock "Product1" DstPort 2 } Line { SrcBlock "r'" SrcPort 1 DstBlock "Product3" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Product3" DstPort 3 } Line { SrcBlock "Trigonometric\nFunction3" SrcPort 1 DstBlock "Product4" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 Points [205, 0; 0, -30] DstBlock "Product4" DstPort 2 } Line { SrcBlock "Product1" SrcPort 1 Points [30, 0; 0, 85] DstBlock "Add" DstPort 1 } Line { SrcBlock "Product3" SrcPort 1 DstBlock "Add" DstPort 2 } Line { SrcBlock "Product4" SrcPort 1 Points [25, 0; 0, -50] DstBlock "Add" DstPort 3 } Line { SrcBlock "r" SrcPort 1 Points [15, 0; 0, 65] DstBlock "Divide" DstPort 1 } Line { SrcBlock "Add" SrcPort 1 DstBlock "Divide" DstPort 2 } Line { SrcBlock "Divide" SrcPort 1 Points [5, 0] Branch { DstBlock "Integrator" DstPort 1 } Branch { Points [0, -55] DstBlock "Theta''" DstPort 1 } } Line { SrcBlock "Integrator" SrcPort 1 Points [10, 0] Branch { DstBlock "Integrator1" DstPort 1 } Branch { Points [0, 180; -605, 0; 0, -175] DstBlock "Product3" DstPort 2 } Branch { Points [0, -55] DstBlock "Theta'" DstPort 1 } } Line { SrcBlock "Integrator1" SrcPort 1 Points [35, 0] Branch { DstBlock "Theta" DstPort 1 } Branch { Points [0, -155; -625, 0; 0, 80; 100, 0] Branch { DstBlock "Trigonometric\nFunction2" DstPort 1 } Branch { Points [0, 150] DstBlock "Trigonometric\nFunction3" DstPort 1 } } } } } Block { BlockType SubSystem Name "Eq_d" SID 40 Ports [3, 3] Position [435, 271, 550, 339] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Eq_d" Location [556, 107, 1156, 395] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "F" SID 41 Position [25, 153, 55, 167] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "T" SID 42 Position [25, 98, 55, 112] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "Theta" SID 43 Position [25, 33, 55, 47] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant" SID 44 Position [80, 185, 110, 215] Value "Cd" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant1" SID 45 Position [260, 190, 290, 220] Value "Mc" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Product Name "Divide" SID 46 Ports [2, 1] Position [325, 152, 355, 183] Inputs "*/" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Integrator Name "Integrator" SID 47 Ports [1, 1] Position [385, 155, 415, 185] } Block { BlockType Integrator Name "Integrator1" SID 48 Ports [1, 1] Position [480, 155, 510, 185] } Block { BlockType Product Name "Product" SID 49 Ports [2, 1] Position [170, 82, 200, 113] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product1" SID 50 Ports [2, 1] Position [180, 192, 210, 223] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum" SID 51 Ports [3, 1] Position [220, 150, 240, 170] ShowName off IconShape "round" Inputs "++-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Trigonometry Name "Trigonometric\nFunction" SID 52 Ports [1, 1] Position [95, 25, 125, 55] } Block { BlockType Outport Name "d" SID 53 Position [545, 163, 575, 177] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "d'" SID 54 Position [545, 123, 575, 137] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "d''" SID 55 Position [545, 83, 575, 97] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Line { SrcBlock "Product" SrcPort 1 Points [25, 0] DstBlock "Sum" DstPort 1 } Line { SrcBlock "Trigonometric\nFunction" SrcPort 1 Points [20, 0; 0, 50] DstBlock "Product" DstPort 1 } Line { SrcBlock "Product1" SrcPort 1 Points [15, 0] DstBlock "Sum" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Product1" DstPort 1 } Line { SrcBlock "Sum" SrcPort 1 DstBlock "Divide" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 Points [5, 0; 0, -30] DstBlock "Divide" DstPort 2 } Line { SrcBlock "Divide" SrcPort 1 Points [5, 0] Branch { DstBlock "Integrator" DstPort 1 } Branch { Points [0, -80] DstBlock "d''" DstPort 1 } } Line { SrcBlock "Integrator" SrcPort 1 Points [10, 0] Branch { Points [15, 0] Branch { DstBlock "Integrator1" DstPort 1 } Branch { Points [0, 90; -280, 0] DstBlock "Product1" DstPort 2 } } Branch { Points [0, -40] DstBlock "d'" DstPort 1 } } Line { SrcBlock "F" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "T" SrcPort 1 DstBlock "Product" DstPort 2 } Line { SrcBlock "Theta" SrcPort 1 DstBlock "Trigonometric\nFunction" DstPort 1 } Line { SrcBlock "Integrator1" SrcPort 1 DstBlock "d" DstPort 1 } } } Block { BlockType SubSystem Name "Eq_r" SID 56 Ports [4, 3] Position [430, 176, 555, 229] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Eq_r" Location [215, 204, 1375, 908] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "C" SID 57 Position [120, 123, 150, 137] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "d''" SID 58 Position [25, 323, 55, 337] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "Theta" SID 59 Position [25, 263, 55, 277] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "Theta'" SID 60 Position [25, 378, 55, 392] Port "4" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Sum Name "Add" SID 61 Ports [5, 1] Position [385, 127, 490, 333] Inputs "---++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "Constant" SID 62 Position [70, 140, 100, 170] Value "b" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant1" SID 63 Position [100, 60, 130, 90] Value "J" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant2" SID 64 Position [180, 25, 210, 55] Value "m" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant3" SID 65 Position [45, 210, 75, 240] Value "Cr" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant4" SID 66 Position [185, 460, 215, 490] Value "g" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Product Name "Divide" SID 67 Ports [2, 1] Position [280, 132, 310, 163] Inputs "*/" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide1" SID 68 Ports [2, 1] Position [175, 162, 205, 193] Inputs "**" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide2" SID 69 Ports [2, 1] Position [265, 67, 295, 98] Inputs "*/" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide3" SID 70 Ports [2, 1] Position [520, 177, 550, 208] Inputs "/*" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide4" SID 71 Ports [2, 1] Position [280, 187, 310, 218] Inputs "/*" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide5" SID 72 Ports [2, 1] Position [185, 217, 215, 248] Inputs "**" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide6" SID 73 Ports [3, 1] Position [280, 254, 310, 286] Inputs "***" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide7" SID 74 Ports [2, 1] Position [120, 362, 150, 393] Inputs "**" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide8" SID 75 Ports [3, 1] Position [280, 364, 310, 396] Inputs "***" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide9" SID 76 Ports [3, 1] Position [280, 424, 310, 456] Inputs "***" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Integrator Name "Integrator" SID 77 Ports [1, 1] Position [685, 180, 715, 210] InitialCondition "R" } Block { BlockType Integrator Name "Integrator1" SID 78 Ports [1, 1] Position [600, 180, 630, 210] } Block { BlockType Sum Name "Sum" SID 79 Ports [2, 1] Position [290, 30, 310, 50] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Trigonometry Name "Trigonometric\nFunction2" SID 80 Ports [1, 1] Position [95, 255, 125, 285] } Block { BlockType Trigonometry Name "Trigonometric\nFunction3" SID 81 Ports [1, 1] Position [120, 425, 150, 455] Operator "cos" } Block { BlockType Outport Name "r" SID 82 Position [765, 188, 795, 202] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "r'" SID 83 Position [675, 138, 705, 152] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "r''" SID 84 Position [605, 138, 635, 152] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Line { SrcBlock "C" SrcPort 1 Points [110, 0] DstBlock "Divide" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [25, 0] Branch { DstBlock "Divide" DstPort 2 } Branch { Points [0, 15] Branch { DstBlock "Divide1" DstPort 1 } Branch { Points [0, 15] DstBlock "Divide1" DstPort 2 } } } Line { SrcBlock "Divide" SrcPort 1 DstBlock "Add" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 Points [30, 0] Branch { DstBlock "Sum" DstPort 1 } Branch { Points [0, 220] Branch { DstBlock "Divide6" DstPort 1 } Branch { Points [0, 105] Branch { Points [0, 5] DstBlock "Divide8" DstPort 1 } Branch { Points [0, 65] DstBlock "Divide9" DstPort 1 } } } } Line { SrcBlock "Divide2" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Divide2" DstPort 1 } Line { SrcBlock "Divide1" SrcPort 1 Points [15, 0; 0, -5] Branch { Points [0, -85] DstBlock "Divide2" DstPort 2 } Branch { Points [0, 20] DstBlock "Divide4" DstPort 1 } } Line { SrcBlock "Sum" SrcPort 1 Points [190, 0] DstBlock "Divide3" DstPort 1 } Line { SrcBlock "Add" SrcPort 1 Points [0, -30] DstBlock "Divide3" DstPort 2 } Line { SrcBlock "Divide3" SrcPort 1 Points [10, 0] Branch { DstBlock "Integrator1" DstPort 1 } Branch { Points [0, -50] DstBlock "r''" DstPort 1 } } Line { SrcBlock "Integrator1" SrcPort 1 Points [15, 0] Branch { DstBlock "Integrator" DstPort 1 } Branch { Points [0, 165; -480, 0] DstBlock "Divide5" DstPort 2 } Branch { Points [0, -50] DstBlock "r'" DstPort 1 } } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Divide5" DstPort 1 } Line { SrcBlock "Divide5" SrcPort 1 Points [5, 0; 0, -25] DstBlock "Divide4" DstPort 2 } Line { SrcBlock "Divide4" SrcPort 1 Points [10, 0; 0, -15] DstBlock "Add" DstPort 2 } Line { SrcBlock "Theta" SrcPort 1 Points [5, 0] Branch { DstBlock "Trigonometric\nFunction2" DstPort 1 } Branch { Points [0, 170] DstBlock "Trigonometric\nFunction3" DstPort 1 } } Line { SrcBlock "d''" SrcPort 1 Points [90, 0; 0, -50] DstBlock "Divide6" DstPort 3 } Line { SrcBlock "Trigonometric\nFunction2" SrcPort 1 DstBlock "Divide6" DstPort 2 } Line { SrcBlock "Divide6" SrcPort 1 Points [10, 0; 0, -40] DstBlock "Add" DstPort 3 } Line { SrcBlock "Theta'" SrcPort 1 Points [15, 0] Branch { DstBlock "Divide7" DstPort 2 } Branch { Points [0, -15] DstBlock "Divide7" DstPort 1 } } Line { SrcBlock "Divide7" SrcPort 1 DstBlock "Divide8" DstPort 2 } Line { SrcBlock "Integrator" SrcPort 1 Points [10, 0] Branch { Points [0, 220; -465, 0] DstBlock "Divide8" DstPort 3 } Branch { DstBlock "r" DstPort 1 } } Line { SrcBlock "Divide8" SrcPort 1 Points [20, 0; 0, -110] DstBlock "Add" DstPort 4 } Line { SrcBlock "Trigonometric\nFunction3" SrcPort 1 DstBlock "Divide9" DstPort 2 } Line { SrcBlock "Constant4" SrcPort 1 Points [20, 0; 0, -25] DstBlock "Divide9" DstPort 3 } Line { SrcBlock "Divide9" SrcPort 1 Points [45, 0; 0, -130] DstBlock "Add" DstPort 5 } } } Block { BlockType Saturate Name "Saturation" SID 190 Position [180, 270, 210, 300] UpperLimit "1e4" LowerLimit "-1e4" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Saturate Name "Saturation1" SID 191 Position [225, 165, 255, 195] UpperLimit "3e3" LowerLimit "-3e3" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Sum Name "Sum2" SID 193 Ports [2, 1] Position [115, 170, 135, 190] ShowName off IconShape "round" Inputs "+-|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType SubSystem Name "T" SID 85 Ports [3, 1] Position [685, 146, 795, 284] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "T" Location [422, 170, 1111, 827] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "r'" SID 86 Position [95, 178, 125, 192] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "r''" SID 87 Position [95, 378, 125, 392] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Inport Name "C" SID 88 Position [95, 318, 125, 332] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Product Name "Divide" SID 89 Ports [3, 1] Position [155, 380, 185, 450] Inputs "**/" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide1" SID 90 Ports [3, 1] Position [155, 171, 195, 239] Inputs "**/" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Divide2" SID 91 Ports [2, 1] Position [310, 197, 340, 228] Inputs "*/" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 92 Ports [2, 1] Position [225, 315, 245, 335] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum3" SID 93 Ports [2, 1] Position [240, 195, 260, 215] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "g" SID 94 Position [95, 435, 125, 465] ShowName off Value "b" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "g1" SID 95 Position [60, 195, 90, 225] ShowName off Value "Cr" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "g2" SID 96 Position [95, 255, 125, 285] ShowName off Value "b" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "g3" SID 97 Position [255, 260, 285, 290] ShowName off Value "b" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "g4" SID 98 Position [50, 400, 80, 430] ShowName off Value "J" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "T" SID 99 Position [385, 208, 415, 222] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Line { SrcBlock "r''" SrcPort 1 Points [10, 0] DstBlock "Divide" DstPort 1 } Line { SrcBlock "C" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Divide" SrcPort 1 Points [45, 0] DstBlock "Sum2" DstPort 2 } Line { SrcBlock "r'" SrcPort 1 DstBlock "Divide1" DstPort 1 } Line { SrcBlock "g1" SrcPort 1 Points [30, 0; 0, -5] DstBlock "Divide1" DstPort 2 } Line { SrcBlock "g2" SrcPort 1 Points [5, 0; 0, -45] DstBlock "Divide1" DstPort 3 } Line { SrcBlock "Divide1" SrcPort 1 DstBlock "Sum3" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Sum3" DstPort 2 } Line { SrcBlock "Sum3" SrcPort 1 DstBlock "Divide2" DstPort 1 } Line { SrcBlock "g3" SrcPort 1 Points [5, 0] DstBlock "Divide2" DstPort 2 } Line { SrcBlock "Divide2" SrcPort 1 DstBlock "T" DstPort 1 } Line { SrcBlock "g" SrcPort 1 Points [5, 0; 0, -10] DstBlock "Divide" DstPort 3 } Line { SrcBlock "g4" SrcPort 1 DstBlock "Divide" DstPort 2 } } } Block { BlockType Outport Name "d" SID 100 Position [860, 353, 890, 367] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "r" SID 101 Position [855, 113, 885, 127] Port "2" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "Theta" SID 102 Position [855, 48, 885, 62] Port "3" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "d'" SID 103 Position [860, 408, 890, 422] Port "4" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "r'" SID 104 Position [855, 298, 885, 312] Port "5" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Outport Name "Theta'" SID 105 Position [855, 78, 885, 92] Port "6" IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Line { SrcBlock "Eq_r" SrcPort 2 Points [5, 0] Branch { Points [45, 0; 0, -25] Branch { Points [0, -45; -195, 0] DstBlock "Eq_Theta" DstPort 3 } Branch { Points [60, 0] DstBlock "T" DstPort 1 } } Branch { Points [0, 100] DstBlock "r'" DstPort 1 } } Line { SrcBlock "Eq_r" SrcPort 1 Points [0, -30] Branch { Points [0, -15; -155, 0; 0, -60] DstBlock "Eq_Theta" DstPort 2 } Branch { Points [90, 0; 0, -40] DstBlock "r" DstPort 1 } } Line { SrcBlock "Eq_d" SrcPort 3 Points [40, 0; 0, 35; -200, 0; 0, -170] Branch { Points [0, -125] DstBlock "Eq_Theta" DstPort 1 } Branch { Points [0, 5] DstBlock "Eq_r" DstPort 2 } } Line { SrcBlock "Eq_d" SrcPort 2 Points [5, 0; 0, 110] DstBlock "d'" DstPort 1 } Line { SrcBlock "Eq_Theta" SrcPort 1 Points [0, -10] Branch { Points [0, -10; -220, 0; 0, 155] Branch { Points [-25, 0; 0, 125] DstBlock "Eq_d" DstPort 3 } Branch { Points [0, 10] DstBlock "Eq_r" DstPort 3 } } Branch { DstBlock "Theta" DstPort 1 } } Line { SrcBlock "Eq_Theta" SrcPort 2 Points [30, 0] Branch { Points [0, -55; -290, 0; 0, 195] DstBlock "Eq_r" DstPort 4 } Branch { DstBlock "Theta'" DstPort 1 } } Line { SrcBlock "Eq_r" SrcPort 3 Points [110, 0] DstBlock "T" DstPort 2 } Line { SrcBlock "F" SrcPort 1 DstBlock "Saturation" DstPort 1 } Line { SrcBlock "T" SrcPort 1 Points [25, 0; 0, 240; -405, 0] DstBlock "Eq_d" DstPort 2 } Line { SrcBlock "Eq_d" SrcPort 1 Points [110, 0; 0, 75] DstBlock "d" DstPort 1 } Line { SrcBlock "Saturation" SrcPort 1 DstBlock "Eq_d" DstPort 1 } Line { SrcBlock "Saturation1" SrcPort 1 Points [20, 0] Branch { DstBlock "Eq_r" DstPort 1 } Branch { Points [0, 80] DstBlock "T" DstPort 3 } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Saturation1" DstPort 1 } Line { SrcBlock "C + C0" SrcPort 1 DstBlock "Sum2" DstPort 2 } } } } }