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-\subsection{Prérequis et rappels} - -\begin{itemize} -\item logique cablée -\begin{itemize} -\item Circuit séquentiels -\item circuit combinatoire -\end{itemize} -\item très rapide -\item econome en energie -\item complexe à définir -\item figé ou difficillement modifiable -\item inadapté aux taches complexes -\end{itemize} -\subsection{Autre approche : logique programmée} - -\begin{itemize} -\item Le programme est stocké et mémoriser dans le systeme -\item Quantum d'information adopté en général : l'octet : 8bit. -\item stocké dans la mémoire morte (ROM) sous la forme d'une série de mots. -\item les données manipulées sont rangés en mémoire vive (RAM). -\end{itemize} - -2 \textbf{espaces} sont nécessaires : -\begin{itemize} -\item Programme -\item Données -\end{itemize} -Ces espaces peuvent être disjoint (ex: PIC), ou commun (PC) -\subsection{Organisation interne de petit système} - - -\begin{itemize} -\item ROM -\item RAM -\item Processeur -\item Entree/Sortie -\end{itemize} -\subsubsection{interconnexion des élements:} - -Utilisation des buffers 3 états : \textbf{images} -\begin{center} -\begin{tabular}{rrl} -\hline -ES & E & S\\ -\hline -0 & 0 & 0\\ -0 & 1 & 1\\ -1 & 0 & Z\\ -1 & 0 & Z\\ -\hline -\end{tabular} -\end{center} -avec \textbf{Z} état à haute impédance. -on a alors une structure de Bus. -\begin{center} -\includegraphics[width=0.7\textwidth]{./systeme.png} -\end{center} - -La structure de bus est composé deux trois type de bus: -\begin{itemize} -\item bus d'adresse : désigne une case menu -\item bus de donnée : circuit des données -\item bus de commande (contrôle) , pour séquencer les opération d'échange -\end{itemize} -\subsection{Analyse d'un exemple} - -\begin{itemize} -\item identification des éléments -\begin{itemize} -\item U1 : processeur Z80 (CPU) boitier 40 broches -\item U2 : RAM 32 kB -\item U3 : EPROM : Enable Programmable Read Only Memory -\item U4 : PIO :Parallel Input Output -\end{itemize} -\end{itemize} -\section{Le timer et les séries} - -Les timers sont nécessaires pour pouvoir mesurer le temps, sans monopoliser le processeur pour ca -\subsection{Fonction des timers:} - -\begin{itemize} -\item mesurer la durée d'une impulsion -\item compter des évènements (exemple codeur) -\item Générer une PWM -\item Lancer une fonction périodique -\end{itemize} -\subsection{fonctionnement du timer} - -Voir slide du poly -\subsection{Timers du LPC804} - -\section{Programmation des machines à états (FSM)} - -\subsection{principe général pour \(\mu\) C} - -\begin{center} -\includegraphics[width=0.7\textwidth]{./etat.png} -\end{center} - - -L'enjeu est de conserver et de mettre à jour facilement l'état de la machine en fonction des différentes taches. -\section{Appel de sous-programme, interruption et utilisation de la pile par le micro controlleur.} - - --> faire cohabiter des taches différentes: -\begin{itemize} -\item Longue peux prioritaire (affichage LCD ..) -\item Courte péridique et prioritaire ( échantillonage ) -\item Rares (liaison série ..) -\end{itemize} - -\subsection{Fonctionnement des processeur: le cas du Cortex M0+} - -\begin{itemize} -\item faible consommation électrique -\item 56 instructions , 16 registre internes -\item Controlleur d'interruption NVIC -\item Systick timer -\end{itemize} - -\url{http://www.infocenter.arm.com} - -\subsection{fonctionnement de la CPU : schéma interne.} - -\begin{center} -\includegraphics[width=.9\linewidth]{./arm.png} -\end{center} -\subsection{les exceptions} - -\begin{itemize} -\item met en pause le programme pour exécuter un programme annexe, -\item Exception matérielle : interruption -\item 32 exception externe possible pour le cortex M0+ . -\end{itemize} -* - - -\section{I2C et LPC804} - -3 protocoles classiques : -\begin{itemize} -\item Serial -\item I2C -\item SPI -\end{itemize} -\begin{longtable}{|l|l|l|} -Serial & SPI & I2C\\ -\hline -\endfirsthead -\multicolumn{3}{l}{Continued from previous page} \\ -\hline - -Serial & SPI & I2C \\ - -\hline -\endhead -\hline\multicolumn{3}{r}{Continued on next page} \\ -\endfoot -\endlastfoot -\hline -Asynchrone & Synchrone & \\ -\hline -Pas d'émulation soft \footnotemark & emulation soft & emulation soft\\ -point à point & point à point & BUS (adresse pour chaque périphérique I2C)\\ - & & \\ - & & \\ -\end{longtable} -\footnotetext[1]{nécessité d'une aide physique (timer \ldots{})} - -\begin{center} -\includegraphics[width=.9\linewidth]{./i2c.png} -\end{center}} - -\subsection{Technologie utilisé pour les bus :} - -Les sorties doivent etre à collecteur ouvert (pas de court circuit). La vitesse du bu est limité par la commutation de la résistance, -moins efficace mais plus imple qu'un circuit à état/haute impédance - -\subsection{Trame I2C} - -cf le poly distribué en cours -\section{CAN et CNA} - - -\emph{Objectif: interfacer des dispositifs analogique et numérique} - -\subsection{Signal analogique / signal numérique} - - -La numérisation d'un signal fait intervenir: -\begin{itemize} -\item Un echantilonnage -\item Une quantification -\end{itemize} - -attention au théorème de shannon. - -Différents formats numérique audio (codage des données avec ou sans pertes sur plus ou moins de bits) - -\subsection{Convertisseur Numérique analogique} - - -\begin{circuitikz} -\draw (0,0) to[R,l=\(R\)] ++(2,0) node(A)\{\(\bullet\)\} (A)node[above]\{\(V_3\)\}; -\end{circuitikz} -(A) to[R,l=\(R\)] ++(2,0) node(B)\{\(\bullet\)\} node[above]\{\(V_2\)\} - (B) to[R,l=\(R\)] ++(2,0) node(C)\{\(\bullet\)\} node[above]\{\(V_1\)\} - (C) to[R,l=\(R\)] ++(2,0) node(D)\{\(\bullet\)\} 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diff --git a/441-Info_indus/TD1/schema.svg b/441-Info_indus/TD1/schema.svg deleted file mode 100644 index 41f7cf7..0000000 --- a/441-Info_indus/TD1/schema.svg +++ /dev/null @@ -1,716 +0,0 @@ - - - - - - - - - - - - image/svg+xml - - - - - - - U6D_11 - $BXXX.($X0XX+$X1XX+$X2XX+$X3XX) - - - - - - - - - - - - - - - - - D0 - D1 - D3 - D2 - A0 - A1 - A2 - A3 - A4 - A5 - - - A6 - A7 - - - A8 - A9 - - - - - - - - - - - - - - - - D4 - D5 - D7 - D6 - A0 - A1 - A2 - A3 - A4 - A5 - - - A6 - A7 - - - A8 - A9 - - - - WE - CS - WE - CS - - - - - 2114 - 2114 - - - - - - diff --git a/441-Info_indus/TD1/td.org b/441-Info_indus/TD1/td.org deleted file mode 100644 index 13aa0ab..0000000 --- a/441-Info_indus/TD1/td.org +++ /dev/null @@ -1,77 +0,0 @@ -#+TITLE:Étude structurelle du micro-ordinateur "Replica 1" -#+OPTIONS: toc:nil -#+OPTIONS: num:nil - -* Le coeur du système : le =6205= -1. Le bus d'adressage est de 16 bits (pins =A0= à =A15=) celui de donnée est sur 8 bits (pin =D0= à =D7= ) - On a donc un espace adressable de : 2^16 * 8 = 64 kiloctets. -2. Un microcontrolleur est un "tout en un" où la mémoire est incluse sur la puce, et ou les pins sont alors majoritairement des entrée/sorties. - le 6205 est lui un microprocesseur en effet il ne dispose pas de broche entrées/sorties, et l'accès au bus peux se faire depuis l'extérieur, la mémoire n'est pas incluse sur la puce. -3. =R1= et =R4= sont des résistances de tirage, (pull-up) qui permet de fixer un état dominant(haute impédance) (ici =0=) à la place d'un état récessif (ici =1=) - -* Etude des circuits mémoires =27C64= et =62256= -1. - - U3 : =27C64= - - Données: 8 bits (=DQ0= à =DQ7=) - - Adresses: 13 bits (=A0= à =A12=) - Soit un total de 2^13*8 = 64kbits= 8kiloctets - Il s'agit de la mémoire morte (ROM) , en effet le signal d'écriture =WE= n'est pas utilisé sur la puce U3. - - U4 : =62256= - - Données: 8 bits (=D0= à =D7=) - - Adresses: 15 bits (=A0= à =A14=) (le pin =A15= est utilisé pour le =chip select=) - Soit un total de 2^15*8 = 32 kilo-octets - Il s'agit de la mémoire vive (RAM) en effet le signal d'écriture =WE= est lui branché sur la puce. - -2. - Étude de U4 : $\overline{\texttt{CS}}$ est branché sur =A15= donc l'espace de mémoire s'étend de =0000= à =7FFF=. -3. - Le circuit U5 est un démultiplexeur.(3 adresses d'entrée, 8 sorties) - - | =A15= | =A14= | =A13= | =A12= | =Y_i= | Adresse considérées | - |-------+-------+-------+-------+-------+---------------------| - | 1 | 0 | 0 | 0 | 0 | 8XXX | - | 1 | 0 | 0 | 1 | 1 | 9XXX | - | 1 | 0 | 1 | 0 | 2 | AXXX | - | 1 | 0 | 1 | 1 | 3 | BXXX | - | 1 | 1 | 0 | 0 | 4 | CXXX | - | 1 | 1 | 0 | 1 | 5 | DXXX | - | 1 | 1 | 1 | 0 | 6 | EXXX | - | 1 | 1 | 1 | 1 | 7 | FXXX | - - Ce circuit permet de sélectionner des plages de 4 kilo-octets -4. - Les sorties =Y6= et =Y7= déclenche l'accès mémoire sur U3 (ROM) les deux dernières plages =EXXX= et =FXXX= sont donc réservées pour la ROM. - $\overline{\texttt{CE}} = \overline{\texttt{OE}} = \overline{\texttt{Y}_6}.\overline{\texttt{Y}_7}$ -5. - L'espace mémoire peux se représenter ainsi: -+-----+-----+-----+-----+-----+ -|0XXX |8XXX | ... |EXXX |FXXX | -+-----+-----+-----+-----+-----+ -| RAM | |ROM | -+-----------+-----+-----------+ - -* Étude du circuit d'entré sortie U2 -1. Le composant U2 possède deux registre (A et B) de 8 bits chacun ,la sélection du registre à utiliser se fait par les pins =RS0= et =RS1= -2. CS2 est relié à U5 sur la broche =Y_4= donnant accès à la plage =DXXX= donc U2 occupe une plage de 4 octets dans la mémoire. - +-----+-----+-----+-----+-----+-----+ - |0XXX |8XXX | ... |DXXX |EXXX |FXXX | - +-----+-----+-----+-----+-----+-----+ - | RAM | | I/O |ROM | - +-----------+-----+-----+-----------+ -* Extension de l'espace mémoire du système -1. Le circuit =2114= possède une capacité mémoire de 4096 bit (512 octets) organisé en 1024 mots de 4 bits. - -2. Pour remplir le kilo-octet de mémoire disponible (=B000= à =BFFF=) donc 2 circuit =2114= sont nécessaires, pour pouvoir écrire des mots de 8 bits, sur un kilo-octet. - -3. et 5. - +-----+-----+-----+-----+----------------+-----+-------+-----+-----+ - |0XXX | ... |8XXX |AXXX | BXXX |CXXX |DXXX |EXXX |FXXX | - +-----+-----+-----+-----+--------+-------+-----+-------+-----+-----+ - | RAM | | B000 | B400 | | I/O |ROM | - | | | B3FF | BFFF | | (U2) | | - | | +--------+-------+ | | | - | | | 2114 | 2114 | | | | - +-----------------+-----+--------+-------+-----+-------+-----------+ -4. - -[[./schema.png]] diff --git a/441-Info_indus/TD1/td.tex b/441-Info_indus/TD1/td.tex deleted file mode 100644 index 4729085..0000000 --- a/441-Info_indus/TD1/td.tex +++ /dev/null @@ -1,138 +0,0 @@ -% Created 2018-10-04 jeu. 18:39 -% Intended LaTeX compiler: pdflatex -\documentclass[11pt]{article} -\usepackage[utf8]{inputenc} -\usepackage[T1]{fontenc} -\usepackage{graphicx} -\usepackage{grffile} -\usepackage{longtable} -\usepackage{wrapfig} -\usepackage{rotating} -\usepackage[normalem]{ulem} -\usepackage{amsmath} -\usepackage{textcomp} -\usepackage{amssymb} -\usepackage{capt-of} -\usepackage{hyperref} -\usepackage[margin=2cm]{geometry} -\author{Pierre-Antoine} -\date{\today} -\title{Étude structurelle du micro-ordinateur "Replica 1"} -\hypersetup{ - pdfauthor={Pierre-Antoine}, - pdftitle={Étude structurelle du micro-ordinateur "Replica 1"}, - pdfkeywords={}, - pdfsubject={}, - pdfcreator={Emacs 25.2.2 (Org mode 9.1.13)}, - pdflang={English}} -\begin{document} - -\maketitle - -\section*{Le coeur du système : le \texttt{6205}} -\label{sec:orgc2c424c} -\begin{enumerate} -\item Le bus d'adressage est de 16 bits (pins \texttt{A0} à \texttt{A15}) celui de donnée est sur 8 bits (pin \texttt{D0} à \texttt{D7} ) -On a donc un espace adressable de : 2\(^{\text{16}}\) * 8 = 64 kiloctets. -\item Un microcontrolleur est un "tout en un" où la mémoire est incluse sur la puce, et ou les pins sont alors majoritairement des entrée/sorties. -le 6205 est lui un microprocesseur en effet il ne dispose pas de broche entrées/sorties, et l'accès au bus peux se faire depuis l'extérieur, la mémoire n'est pas incluse sur la puce. -\item \texttt{R1} et \texttt{R4} sont des résistances de tirage, (pull-up) qui permet de fixer un état dominant(haute impédance) (ici \texttt{0}) à la place d'un état récessif (ici \texttt{1}) -\end{enumerate} - -\section*{Etude des circuits mémoires \texttt{27C64} et \texttt{62256}} -\label{sec:org3a2c3b7} -\begin{enumerate} -\item \begin{itemize} -\item U3 : \texttt{27C64} -\begin{itemize} -\item Données: 8 bits (\texttt{DQ0} à \texttt{DQ7}) -\item Adresses: 13 bits (\texttt{A0} à \texttt{A12}) -\end{itemize} -\end{itemize} -Soit un total de 2\(^{\text{13}}\)*8 = 64kbits= 8kiloctets -Il s'agit de la mémoire morte (ROM) , en effet le signal d'écriture \texttt{WE} n'est pas utilisé sur la puce U3. -\begin{itemize} -\item U4 : \texttt{62256} -\begin{itemize} -\item Données: 8 bits (\texttt{D0} à \texttt{D7}) -\item Adresses: 15 bits (\texttt{A0} à \texttt{A14}) (le pin \texttt{A15} est utilisé pour le \texttt{chip select}) -\end{itemize} -\end{itemize} -Soit un total de 2\(^{\text{15}}\)*8 = 32 kilo-octets -Il s'agit de la mémoire vive (RAM) en effet le signal d'écriture \texttt{WE} est lui branché sur la puce. - -\item Étude de U4 : \(\overline{\texttt{CS}}\) est branché sur \texttt{A15} donc l'espace de mémoire s'étend de \texttt{0000} à \texttt{7FFF}. -\item Le circuit U5 est un démultiplexeur.(3 adresses d'entrée, 8 sorties) - -\begin{center} -\begin{tabular}{rrrrrl} -\texttt{A15} & \texttt{A14} & \texttt{A13} & \texttt{A12} & \texttt{Y\_i} & Adresse considérées\\ -\hline -1 & 0 & 0 & 0 & 0 & 8XXX\\ -1 & 0 & 0 & 1 & 1 & 9XXX\\ -1 & 0 & 1 & 0 & 2 & AXXX\\ -1 & 0 & 1 & 1 & 3 & BXXX\\ -1 & 1 & 0 & 0 & 4 & CXXX\\ -1 & 1 & 0 & 1 & 5 & DXXX\\ -1 & 1 & 1 & 0 & 6 & EXXX\\ -1 & 1 & 1 & 1 & 7 & FXXX\\ -\end{tabular} -\end{center} - -Ce circuit permet de sélectionner des plages de 4 kilo-octets -\item Les sorties \texttt{Y6} et \texttt{Y7} déclenche l'accès mémoire sur U3 (ROM) les deux dernières plages \texttt{EXXX} et \texttt{FXXX} sont donc réservées pour la ROM. -\(\overline{\texttt{CE}} = \overline{\texttt{OE}} = \overline{\texttt{Y}_6}.\overline{\texttt{Y}_7}\) -\item L'espace mémoire peux se représenter ainsi: -\end{enumerate} -\begin{center} -\begin{tabular}{|l|l|l|l|l|} -\hline -0XXX & 8XXX & ... & EXXX & FXXX \\ -\hline -\multicolumn{2}{|l|}{RAM} & & \multicolumn{2}{l|}{ROM} \\ -\hline -\end{tabular} -\end{center} - -\section*{Étude du circuit d'entré sortie U2} -\label{sec:org62aced9} -\begin{enumerate} -\item Le composant U2 possède deux registre (A et B) de 8 bits chacun ,la sélection du registre à utiliser se fait par les pins \texttt{RS0} et \texttt{RS1} -\item CS2 est relié à U5 sur la broche \texttt{Y\_4} donnant accès à la plage \texttt{DXXX} donc U2 occupe une plage de 4 octets dans la mémoire. -\begin{center} -\begin{tabular}{|l|l|l|l|l|l|} -\hline -0XXX & 8XXX & ... & DXXX & EXXX & FXXX \\ -\hline -\multicolumn{2}{|l|}{RAM} & & I/O & \multicolumn{2}{l|}{ROM} \\ -\hline -\end{tabular} -\end{center} -\end{enumerate} -\section*{Extension de l'espace mémoire du système} -\label{sec:org1b5e514} -\begin{enumerate} -\item Le circuit \texttt{2114} possède une capacité mémoire de 4096 bit (512 octets) organisé en 1024 mots de 4 bits. - -\item Pour remplir le kilo-octet de mémoire disponible (\texttt{B000} à \texttt{BFFF}) donc 2 circuit \texttt{2114} sont nécessaires, pour pouvoir écrire des mots de 8 bits, sur un kilo-octet. - -\item et 5. -\begin{center} -\begin{tabular}{|l|l|l|l|l|l|l|l|l|l|} -\hline -0XXX & ... & 8XXX & AXXX & \multicolumn{2}{l|}{BXXX} & CXXX & DXXX & EXXX & FXXX \\ -\hline -\multicolumn{3}{|l|}{RAM} & & B000 & B400 & & I/O & \multicolumn{2}{l|}{ROM} \\ -\multicolumn{3}{|l|}{} & & B3FF & BFFF & & (U2) & \multicolumn{2}{l|}{} \\ -\cline{5-6} -\multicolumn{3}{|l|}{} & & 2114 & 2114 & & & \multicolumn{2}{l|}{} \\ -\hline -\end{tabular} -\end{center} -\item -\end{enumerate} - -\begin{center} -\includegraphics[width=.9\linewidth]{./schema.png} -\end{center} -\end{document} diff --git a/441-Info_indus/TD1/text1296.png b/441-Info_indus/TD1/text1296.png deleted file mode 100644 index 82e051b04824048d3bcdc4b695bd2aa9c2090853..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 766 zcmVCs zyn1qphw%q^LH+=W@}QK-1Ih!rl}qG7W8{7rB)8ng!`?r$=gc{rLCUvw>+HSO-s`*e zS!*vih^2bsBxWb`3bx@s-r_VyMcrgvj^h$qu^SU}&Mm@19Ka16&e6}oUR=kOl+;{| z&DpR3!;<+9?7|Uj#Y+r|x&fGlb2x>E*nnG@S2BRDScE;3!w)NlLU9-!jIvQC8QN<0+07IIr4& zP1ZhO6Gmh4&$)va$yr}>^l$R?l{m5+vV^ALB39xU_MMr0!V#z z3m`AzN|e?01~g%xkoya8R!EaP`xK9L6?+-vWki-+j{u5NsA@O_Q-qq>D7*+mv9`cI z#b;dsmO)VprTQOyE2t3)Fh$=ezeM?3c;0Trd57?f&P)zf;J86oewRU+0J{BwSHcaa z7#(G`+F#*$#^z13uc!uw3$=3XSF98Cx&|I$dd8>;AESH2^z>UtCRxaYDB{lGu#LC#;F{Wzk7foG*-r&Wd9x4hgBbxg_x!n2+N)6Th1h z{p7f|7j0M){TPVz(b=;|?2b&g!Yj<$2XzfuP8~L&|^9?<3yrw$i*3Fud#Yx{>hejB&-%;8R4{gXq#1FmkK04h)ycmMzZ07*qoM6N<$f&%_viU0rr