heptagon/compiler/minils
Gwenaël Delaval 90dda27a3a Bug correction in Schedule_interf
Bug due to the fact that a variable can be "defined" and "read"
(in scheduling sense) by the same equation, without being a memory:
e.g., a clock defined as the result of a node application, together
with another result on this same clock.

Bug correction: basically removed the "assert false" on killed_vars,
decr_uses; do not count as "use" the self reads.
2012-07-26 01:29:22 +02:00
..
analysis Added Marc as co-author 2012-06-29 01:43:15 +02:00
main Added Marc as co-author 2012-06-29 01:43:15 +02:00
sigali Added Marc as co-author 2012-06-29 01:43:15 +02:00
transformations Bug correction in Schedule_interf 2012-07-26 01:29:22 +02:00
_tags Sigali pass into compiler + added a_id field to applications 2011-04-20 12:47:28 +02:00
minils.ml Added Marc as co-author 2012-06-29 01:43:15 +02:00
mls_compare.ml Added Marc as co-author 2012-06-29 01:43:15 +02:00
mls_mapfold.ml Added Marc as co-author 2012-06-29 01:43:15 +02:00
mls_printer.ml Added Marc as co-author 2012-06-29 01:43:15 +02:00
mls_utils.ml Bug correction in Schedule_interf 2012-07-26 01:29:22 +02:00